SNAA393 January   2024 LMK6H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Why use a Phase Noise Analyzer?
  5. 2Understanding Phase Noise Plots
  6. 3Phase Noise Analyzer Measurement Settings
    1. 3.1 Start or Stop Frequency
    2. 3.2 Averaging and Correlation
    3. 3.3 Persistence
    4. 3.4 Spurious View Modes
    5. 3.5 Other Settings
  7. 4Hardware Setup for Different Clocking Formats
    1. 4.1 LVCMOS
    2. 4.2 LVDS
    3. 4.3 LVPECL/HCSL
    4. 4.4 Balun Recommendations
  8. 5Typical Measurements with Different Termination Schemes
    1. 5.1 LVCMOS
    2. 5.2 LVDS
    3. 5.3 LVPECL
    4. 5.4 HCSL
  9. 6Summary
  10. 7References

6 Summary

In summary, it is important to consider the signal terminations for each type of output format to obtain accurate measurements of high-performance clock sources such as the LMK6x Low Jitter, High-Performance BAW Oscillator. To measure the true phase noise performance of such devices, use a properly configured PNA with a low noise floor. The techniques described in this application note maximize signal power and reduce system-level noise and phase noise errors from measurement equipment.