SPRACM9B June   2019  – November 2020 TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   Trademarks
  2. 1 Introduction
    1. 1.1 Acronyms Used in This Document
  3. 2 Benefits of the TMS320F2838x MCU for High-Bandwidth Current Loop
  4. 3 Current Loops in Servo Drives
  5. 4 Outline of the Fast Current Loop Library
  6. 5 Fast Current Loop Evaluation
    1. 5.1 Evaluation Setup
      1. 5.1.1 Hardware
      2. 5.1.2 Software
      3. 5.1.3 FCL With T-Format Type Position Encoder
        1. 5.1.3.1 Connecting T-Format Encoder to IDDK
        2. 5.1.3.2 T-Format Interface Software
        3. 5.1.3.3 T-Format Encoder Latency Considerations
      4. 5.1.4 SDFM
      5. 5.1.5 Incremental System Build
  7. 6 Incremental Build Level 1
    1. 6.1 SVGEN Test
    2. 6.2 Testing SVGEN With DACs
    3. 6.3 Inverter Functionality Verification
  8. 7 Incremental Build Level 2
    1. 7.1 Setting the Overcurrent Limit in the Software
    2. 7.2 Current Sense Method
    3. 7.3 Voltage Sense Method
    4. 7.4 Setting Current Regulator Limits
    5. 7.5 Verification of Current Sense
    6. 7.6 Position Encoder Feedback
      1. 7.6.1 Speed Observer and Position Estimator
      2. 7.6.2 Verification of Position Encoder Orientation
  9. 8 Incremental Build Level 3
    1. 8.1 Observation One – PWM Update Latency
      1. 8.1.1 From the Expressions Window
      2. 8.1.2 From the Scope Plot
  10. 9 Incremental Build Level 4
    1. 9.1 Observation
  11. 10Incremental Build Level 5
  12. 11Incremental Build Level 6
    1. 11.1 Integrating SFRA Library
    2. 11.2 Initial Setup Before Starting SFRA
    3. 11.3 SFRA GUIs
    4. 11.4 Setting Up the GUIs to Connect to Target Platform
    5. 11.5 Running the SFRA GUIs
    6. 11.6 Influence of Current Feedback SNR
    7. 11.7 Inferences
      1. 11.7.1 Bandwidth Determination From Closed Loop Plot
      2. 11.7.2 Phase Margin Determination From Open Loop Plot
      3. 11.7.3 Maximum Modulation Index Determination From PWM Update Time
      4. 11.7.4 Voltage Decoupling in Current Loop
    8. 11.8 Phase Margin vs Gain Crossover Frequency
  13. 12Incremental Build Level 7
    1. 12.1 Run the Code on CPU1 to Allocate ECAT to CM
    2. 12.2 Run the Code on CM to Setup ECAT
    3. 12.3 Setup TwinCAT
    4. 12.4 Scanning for EtherCAT Devices via TwinCAT
    5. 12.5 Program ControlCard EEPROM for ESC
    6. 12.6 Running the Application
  14. 13Incremental Build Level 8
    1. 13.1 Run the Code on CPU1 to Allocate ECAT to CM
    2. 13.2 Run the Code on CM to Setup ECAT
    3. 13.3 Running the Application
  15. 14References
  16. 15Revision History

11.2 Initial Setup Before Starting SFRA

The setting up involves co-ordination between the debug environment and the SFRA GUI. Until getting familiar with connecting the SFRA GUIs to the target platform, it is a good idea to turn off the high voltage power input to the target platform.

The following initial steps can help with evaluating this build level:

  1. Open ’fcl_f2838x_tmdxiddk_settings_cpu1.h’ and select level 6 incremental build option by setting the BUILDLEVEL to FCL_LEVEL6 (#define BUILDLEVEL FCL_LEVEL6).
  2. The current loop regulator can be selected to be PI controller or complex controller by setting FCL_CNTLR to PI_CNTLR or CMPLX_CNTLR.
  3. Select CURRENT_SENSE method to LEM_CURRENT_SENSE.
  4. Select POSITION_ENCODER to QEP_POS_ENCODER or T_FORMAT_ENCODER depending on the encoder coupled to motor.
  5. Select SAMPLING_METHOD to SINGLE_SAMPLING or DOUBLE_SAMPLING. If a T-format encoder is used, select SINGLE_SAMPLING and no more than 10 KHz PWM frequency. For more information, see Section 5.1.3.3.
Open ’fcl_f2838x_sfra_settings_cpu1.h’ and watch out for the definitions:

  • SFRA_FREQ_START
  • SFRA_FREQ_LENGTH
  • FREQ_STEP_MULTIPLY

These definitions inform the GUI about the starting value of noise frequency, number of different noise frequencies to sweep and the ratio between successive sweep frequencies, respectively. More information is available in the C2000™ Software Frequency Response Analyzer (SFRA) Library and Compensation Designer User's Guide associated with SFRA. In the context of this evaluation project, it is important to know and appreciate these parameters to tweak them for further repeat tests.

In this motor control project, SFRA can be performed on any of the three control loops such as the speed loop, D axis current loop and Q axis current loop. Technically, this could be performed on position loop as well, but is not included in this project scope and you can take it as an experiment, if desired.

  1. Right click on the project name and click Rebuild Project. Once the build is complete click on debug button, reset CPU, restart, enable real time mode and run. From the debug environment, the steps to be followed are shown below. Add the following variable in the ‘Expressions Window’:
    1. sfraTestLoop : for selecting the control loop on which to evaluate SFRA, letting you choose between:
      1. SFRA_TEST_D_AXIS - D axis current loop
      2. SFRA_TEST_Q_AXIS - Q axis current loop
      3. SFRA_TEST_SPEEDLOOP - speed loop

The key steps can be explained as follows:

  1. Set enableFlag to 1 in the watch window. The variable named IsrTicker will be incrementally increased as seen in watch windows to confirm the interrupt working properly.
  2. The SCI initialisations needed to communicate with the GUIs should be all done by now.
  3. Further steps with the debug window will follow after setting up the GUIs to connect to target platform.