SPRAD05B May 2023 – December 2023 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
The processor includes nine Dual-voltage IO domains (VDDSHVx [x=0-6], VDDSHV_MCU and VDDSHV_CANUART), where each domain provides power to a fixed set of IOs. Each IO domain can be configured for 3.3 V or 1.8 V, which determines a common operating voltage for the entire set of IOs powered by the respective IO domain. All signals (attached devices) connected to these IO domains must be powered from the same power source that is being used to power the respective processor Dual-voltage IO domains (VDDSHVx supply rail). Most of the processor IOs are not fail-safe. For information on fail-safe IOs, see the device-specific data sheet. A valid supply voltage for the VDDSHVx supplies must be present before any input is applied to the associated peripherals or IOs.
IO grouping information is summarized below:
VDDSHV0 – Voltage for the General IO group
VDDSHV1 – Voltage for the Flash IO group
VDDSHV2 – Voltage for the GEMAC IO group
VDDSHV3 – Voltage for the GPMC IO group
VDDSHV4 – Voltage for the MMC0 IO group
VDDSHV5 – Voltage for the MMC1 IO group
VDDSHV6 – Voltage for the MMC2 IO group
VDDSHV_MCU – Voltage for the WKUP_MCU IO group
VDDSHV_CANUART – Voltage for the CANUART IO group