TIDUF28 November   2023

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 LMG3422R030
      2. 2.2.2 ISO7741
      3. 2.2.3 AMC1306M05
      4. 2.2.4 AMC1035
      5. 2.2.5 TPSM560R6H
      6. 2.2.6 TPSM82903
  9. 3System Design Theory
    1. 3.1 Power Switches
      1. 3.1.1 GaN-FET Selection Criterion
      2. 3.1.2 HVBUS Decoupling and 12-V Bootstrap Supply
      3. 3.1.3 GaN_FET Turn-on Slew Rate Configuration
      4. 3.1.4 PWM Input Filter and Dead-Time Calculation
      5. 3.1.5 Signal Level Shifting
      6. 3.1.6 LMG3422R030 Fault Reporting
      7. 3.1.7 LMG3422R030 Temperature Monitoring
    2. 3.2 Phase Current Sensing
      1. 3.2.1 Shunt
      2. 3.2.2 AMC1306M05 Analog Input-Filter
      3. 3.2.3 AMC1306M05 Digital Interface
      4. 3.2.4 AMC1306M05 Supply
    3. 3.3 DC-Link (HV_BUS) Voltage Sensing
    4. 3.4 Phase Voltage Sensing
    5. 3.5 Control Supply
    6. 3.6 MCU Interface
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 PCB
      2. 4.1.2 MCU Interface
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
      1. 4.3.1 Precautions
      2. 4.3.2 Test Procedure
    4. 4.4 Test Results
      1. 4.4.1 24-V Input Control Supply
      2. 4.4.2 Propagation Delay PWM to Phase Voltage Switch Node
      3. 4.4.3 Switch Node Transient at 320-VDC Bus Voltage
      4. 4.4.4 Phase Voltage Linearity and Distortion at 320 VDC and 16-kHz PWM
      5. 4.4.5 Inverter Efficiency and Thermal Characteristic
        1. 4.4.5.1 Efficiency Measurements
        2. 4.4.5.2 Thermal Analysis and SOA Without Heat Sink at 320 VDC and 16-kHz PWM
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
      4. 5.1.4 Altium Project
      5. 5.1.5 Gerber Files
      6. 5.1.6 Assembly Drawings
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

3.1.4 PWM Input Filter and Dead-Time Calculation

An input low-pass filter at the LMG3422R030 IN pin is recommend to help improve immunity against transient switching noise. This design uses a 3-MHz input low-pass filter with R10 (100 Ω) and C10 (560 pF) for the top side and R20 and C48 for the bottom side. To achieve good propagation delay match, capacitors with 5% tolerance or better are recommended. The time constant and especially the capacitance is higher than the LMG3422R030 data sheet recommended 100 Ω and 22 pF to further increase the transient noise immunity of the system at very high switching currents. Make adjustments during testing according to the needs of the system.

The effective propagation delay in this design for turn-on and turn-off is a function of the 1.9 V (TYP) positive-going input threshold voltage of the LMG3422R030 and the negative-going input threshold voltage of 1 V (TYP). Equation 1 and Equation 2 show the effective signal delay assuming a 5-V CMOS logic PWM signal.

Equation 1. tD_IN(ON)=-ln⁡1-VIN,IT+5 V×C10×R10=27 ns
Equation 2. tD_IN(OFF)=-ln⁡VIN,IT-5V×C10×R10=90 ns

In addition to the PWM signal delay through the input filter per Equation 1 and Equation 2, the LMG3422R030 has a turn-on and turn-off delay, which depends on the configured slew rate. With a 30 V/ns slew rate configuration the LMG3422R030 typical turn-on delay is around 75 ns, while the turn-off delay is around 44 ns. Hence, the effective PWM signal to switch node voltage delay is around 102 ns for turn-on and around 134 ns for turn off. Since the effective turn-on delay is 32 ns shorter than the turn-off delay, this has to be considered when configuring complementary PWM dead-time generated by the PWM module of the MCU.

In this design the TMS320F28379D MCU was configured to generate a 150 ns PWM dead-time, which yields an effective typical dead-time of around 120 ns (118 ns). This provides enough margin to handle variations in the overall effective turn-on and turn-off delay.

A smaller PWM filter time-constant of 10 ns with C10 (100 pF) and C48 (100 pF) is possible, but was not tested with this design. The smaller PWM filter with 10-ns time constant reduces the propagation delay tD_IN(ON) to around 4.7 ns and tD_IN(OFF) to around 16 ns and allows further reduction of the effective dead time.

GUID-20231101-SS0I-LK1T-WVB0-P4R40RWPRRJP-low.gifFigure 3-2 Schematic of Half-Bridge Phase V With LMG3422R030 on Top and Bottom