TIDUF28 Design guide

TIDUF28 November 2023

4.1.2 MCU Interface

The TIDA-010255 offers two options to connect to a MCU:

Connect to a C2000 MCU controlCARD, such as the F28379D development kit for C2000™ Delfino MCU controlCARD™ to headers J1 and J2
Connect to an external MCU to headers J6, J7, J8, J9, and J11

The pin assignment with connectors J1 and J2 is shown in Table 4-1. The table also includes the corresponding I/O signals based on the F28379D control card. All I/O pins are 3.3-V I/O, and only the supply voltage provided to the F28379D controlCARD is 5 V.

Rows where no pin was connected (for example, pin 15 and pin 16) are not shown – to reduce size of the table. The pins and related headers J10 and J12 are marked reserved (RSVD) and are for test and debug.

Table 4-1 C2000™ controlCARD Connector

J1–J2 PIN	F28379D GPIO	TIDA-010255 SIGNAL	J1-J2 PIN	F28379D	TIDA-010255 SIGNAL
7	GND	GND	8	TDI
9	A0	J10-2 (RSVD)	10	GND	GND
11	A1	V_PHASE_W	12	B0	V_PHASE_W
13	GND	GND	14	B1	J10-3 (RSVD)
17	A3		18	B2	V_PHASE_V
19	GND	GND	20	B3	V_PHASE_U
21	A4	J12-3 (RSVD)	22	GND	GND
23	A5	J12-2 (RSVD)	24	B4	TOP_TEMP_V
25	A14		26	B5	BOT_TEMP_V
29	GND	GND	30	D1
31	C2	V_PHASE_V	32	RSV
35	GND	GND	36	D3
37	C4		38	GND	GND
45	VREFHI		46	GND	GND
47	GND	GND	48	5 V	5 V
49	EPWM1A	TOP_FET_V	50	EPWM3A	TOP_FET_W
51	EPWM1B	BOT_FET_V	52	EPWM3B	BOT_FET_W
53	GPIO-2		54	EPWM4A	TOP_FET_U
55	GPIO-3		56	EPWM4B	BOT_FET_U
57	GPIO-8		58	EPWM7A	MCU_CLK_VDC_FB
59	GPIO-9		60	EPWM7B	MCU_CLK_VDC
61	GPIO-10		62	EPWM6A	MCU_CLK_I_FB
63	GPIO-11		64	EPWM6B	MCU_CLK_I
65	GND	GND	66	RSV
83	GND	GND	84	5 V	5 V
89	GPIO-40	GPIO_EN	90	GPIO-44
97	GND	GND	98	5 V	5 V
99	SD1_D1	VOUT_DCLink	100	GPIO-54
101	SD1_C1	MCU_CLK_VDC_FB	102	GPIO-55
103	SD1_D2	IOUT_W	104	GPIO-56
105	SD1_C2	MCU_CLK_I_FB	106	GPIO-57
107	SD1_D3	IOUT_V	108	GPIO-58
109	SD1_C3	MCU_CLK_I_FB	110	GPIO-59
111	GND	GND	112	5 V	5 V
121	GPIO-35		122	GPIO-36	nOC_T
127	SD2_D4	IOUT_U	128	SD2_C4	MCU_CLK_I_FB
135	GND	GND	136	RSV
137	GPIO-70		138	GPIO-71	GaN_Fault_L
139	GPIO-72		140	GPIO-73	GaN_Fault_T
145	GPIO-78		146	GPIO-79	nOC_L
157	GND	GND	158	5 V	5 V
179	GND	GND	180	5 V	5 V

The pin assignments with connectors J6–J9 and J11 are shown in Table 4-2. Note that all pins are 3.3-V I/O signal level.

Table 4-2 External MCU Connectors Assignment J6–J9, J11

J6
Pin	J6-1	J6-2	J6-3	J6-4	J6-5
Signal	TOP_FET_V	BOT_FET_V	TOP_FET_W	BOT_FET_W	TOP_FET_U
Pin	J6-6	J6-7	J6-8
Signal	BOT_FET_U	GND	GND
J7
Pin	J7-1	J7-2	J7-3	J7-4	J7-5
Signal	V_PHASE_W	V_PHASE_V	V_PHASE_U	TOP_TEMP_V	BOT_TEMP_V
Pin	J7-6
Signal	GND
J8
Pin	J8-1	J8-2	J8-3	J8-4	J8-5
Signal	VOUT_DCLink	GND	IOUT_W	GND	IOUT_V
Pin	J8-6	J8-7	J8-8
Signal	GND	IOUT_U	GND
J9
Pin	J9-1	J9-2	J9-3	J9-4
Signal	MCU_CLK_I	GND	MCU_CLK_VDC	GND
J11
Pin	J11-1	J11-2	J11-3	J11-4	J11-5
Signal	nOC_T	GaN_Fault_L	GaN_Fault_T	nOC_L	GND