(ACTIVE) CMOS Quad 2-Input NAND Schmitt Triggers


CD4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negative-going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH) (see Fig. 2).

The CD4093B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).


  • Schmitt-trigger action on each input with no external components
  • Hysteresis voltage typically 0.9 V at VDD = 5 V and 2.3 V at VDD = 10 V
  • Noise immunity greater than 50%
  • No limit on input rise and fall times
  • Standardized, symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range, 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Wave and pulse shapers
    • High-noise-environment systems
    • Monostable multivibrators
    • Astable multivibrators
    • NAND logic


Technology Family CD4000    
VCC (Min) (V) 3    
VCC (Max) (V) 18    
Bits (#) 4    
Voltage (Nom) (V) 10    
F @ Nom Voltage (Max) (Mhz) 8    
ICC @ Nom Voltage (Max) (mA) 0.06    
tpd @ Nom Voltage (Max) (ns) 130    
IOL (Max) (mA) 1.5    
IOH (Max) (mA) -1.5    
Rating Catalog    
Operating Temperature Range (C) -55 to 125    
Pin/Package 14PDIP^14SO^14SOIC^14TSSOP    

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