CD74AC174 Hex D-Type Flip-Flops with Reset | TI.com

CD74AC174
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Hex D-Type Flip-Flops with Reset

Hex D-Type Flip-Flops with Reset - CD74AC174
Datasheet
 

Description

The CD74AC174 is a positive-edge-triggered D-type flip-flop with a direct clear (CLR)\ input and is designed for 1.5-V to 5.5-V VCC operation.

Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.

Features

  • AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
  • Contains Six Flip-Flops With Single-Rail Outputs
  • Buffered Inputs
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers

Parametrics

Compare all products in D-type flip-flop Email Download to Excel
Part number Order Technology Family Input type Output type VCC (Min) (V) VCC (Max) (V) IOL (Max) (mA) IOH (Max) (mA) Rating Package Group
CD74AC174 Order now AC     CMOS     CMOS     1.5     5.5     24     -24     Catalog     PDIP | 16
SOIC | 16