JBP18S030 32X8 Bi-Polar PROM | TI.com

JBP18S030 (NRND) 32X8 Bi-Polar PROM

 

Description

These monolithic TTL programmable read-only memories (PROMs) feature titanium-tungsten (Ti-W) fuse links with each link designed to program in 20 microseconds. The Schottky-clamped versions of these PROMs offer considerable flexibility for upgrading existing designs or improving new designs as they feature full Schottky clamping for improved performance, low-current MOS-compatible p-n-p inputs, choice of bus-drive three-state or open-collector outputs, and improved chip-select access times.

Data can be electronically programmed, as desired, at any bit location in accordance with the programming procedure specified. All PROMs are supplied with a low-logic level output condition stored at each bit location. The programming procedure open-circuits Ti-W metal links, which reverses the stored logic level at selected locations. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may late be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content.

A low level at the chip-select input(s) enables each PROM. The opposite level at any chip-select input causes the outputs to be off.

The three-state output offers the convenience of an open-collector with the speed of the totem-pole output; it can be bus-connected to other similar outputs yet it retains the fast rise time characteristic of the TTL totem-pole output. The open-collector offers the capability of direct interface with a data line having a passive pull up.

A MJ suffix designates full-temperature circuits (formerly 54 family) and are characterized for operation over the full military temperature range of -55°C to 125°C. A J or N suffix designates commercial-temperature circuits (formerly 74 family) and are characterized for operation from 0°C to 70°C.

Features

  • Titamium-Tungsten (Ti-W) Fuse Link for Reliable Low-Voltage Full Family Compatible Programming
  • Full Decoding and Fast Chip Select Simplify System Design
  • P-N-P Inputs for Reduced Loading on System Buffers/Drivers
  • Applications Include:
    • Microprogramming/Firmware Loaders
    • Code Converters/Character Generators
    • Translators/Emulators
    • Address Mapping/Look-Up Tables
  • Choice of 3-State or Open-Collector Outputs