The AUP family is TIs premier solution to the industrys low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
This dual 2-input positive-AND gate performs the Boolean function Y = A B or Y = A\ + B\ in positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
NanoStar is a trademark of Texas Instruments.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Inputs per channel||IOL (Max) (mA)||IOH (Max) (mA)||Input type||Output type||Features||Data rate (Max) (Mbps)||Rating||Operating temperature range (C)||Package size: mm2:W x L (PKG)||Package Group|
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Very High Speed (tpd 5-10ns)
|100||Catalog||-40 to 85||
See datasheet (DSBGA)
8DSBGA: 3 mm2: 2.25 x 1.25 (DSBGA | 8)
8UQFN: 2 mm2: 1.5 x 1.5 (UQFN | 8)
8VSSOP: 6 mm2: 3.1 x 2 (VSSOP | 8)
8X2SON: 1 mm2: 1 x 1.4 (X2SON | 8)
DSBGA | 8
DSBGA | 8
UQFN | 8
VSSOP | 8
X2SON | 8