Detalles del producto

Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 7.5 CON (typ) (pF) 14 ON-state leakage current (max) (µA) 2 Supply current (typ) (µA) 1 Bandwidth (MHz) 300 Operating temperature range (°C) -40 to 125 Input/output continuous current (max) (mA) 50 Rating Automotive Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 7.5 CON (typ) (pF) 14 ON-state leakage current (max) (µA) 2 Supply current (typ) (µA) 1 Bandwidth (MHz) 300 Operating temperature range (°C) -40 to 125 Input/output continuous current (max) (mA) 50 Rating Automotive Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • Functional safety-capable
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C3B
  • 1.65 V to 5.5 V VCC operation
  • Inputs accept voltages to 5.5 V
  • High on-off output voltage ratio
  • High degree of linearity
  • High speed, typically 0.5 ns (VCC = 3 V, CL = 50 pF)
  • Rail-to-rail input output
  • Low on-state resistance, typically ≉6 Ω (VCC = 4.5 V)
  • Functional safety-capable
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C3B
  • 1.65 V to 5.5 V VCC operation
  • Inputs accept voltages to 5.5 V
  • High on-off output voltage ratio
  • High degree of linearity
  • High speed, typically 0.5 ns (VCC = 3 V, CL = 50 pF)
  • Rail-to-rail input output
  • Low on-state resistance, typically ≉6 Ω (VCC = 4.5 V)

The design of this dual bilateral analog switch is for 1.65 V to 5.5 V VCC operation. The SN74LVC2G66-Q1 can handle both analog and digital signals. The device permits signals with amplitudes of up to 5.5 V (peak) to be transmitted in either direction. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

The design of this dual bilateral analog switch is for 1.65 V to 5.5 V VCC operation. The SN74LVC2G66-Q1 can handle both analog and digital signals. The device permits signals with amplitudes of up to 5.5 V (peak) to be transmitted in either direction. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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* Data sheet SN74LVC2G66-Q1 Automotive Dual Bilateral Analog Switch datasheet (Rev. B) PDF | HTML 27 oct 2021
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Functional safety information SN74LVC2G66-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FM PDF | HTML 15 oct 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 jul 2018
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note How to Select Little Logic (Rev. A) 26 jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
More literature Automotive Logic Devices Brochure 27 ago 2014
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 jun 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 nov 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 dic 2002
Application note Texas Instruments Little Logic Application Report 01 nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 may 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 may 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 mar 2002
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 dic 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 ago 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note LVC Characterization Information 01 dic 1996
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 may 1996

Diseño y desarrollo

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Modelo de simulación

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SCEM562B.ZIP (27 KB) - PSpice Model
Modelo de simulación

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Paquete Pasadores Descargar
VSSOP (DCU) 8 Ver opciones

Pedidos y calidad

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  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
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  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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