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Gestión de la energía
Controladores de compuertas
Drivers del lado de tierra

UCC27524

ACTIVO

Controlador de puerta de doble canal 5 A/5 A con UVLO de 5 V, activación y coincidencia de retardo d

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UCC27524

ACTIVO
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Detalles del producto

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 PDIP (P) 8 92.5083 mm² 9.81 x 9.43 SOIC (D) 8 29.4 mm² 4.9 x 6 WSON (DSD) 8 9 mm² 3 x 3
  • Industry-Standard Pinout
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO, (Ensures
    Glitch-Free Operation at Power up and Power
    Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between Two
    Channels
  • Two Outputs are in Parallel for Higher Drive
    Current
  • Outputs Held Low When Inputs Floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and
    3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C
  • Industry-Standard Pinout
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink-Drive Current
  • Independent-Enable Function for Each Output
  • TTL and CMOS Compatible Logic Threshold
    Independent of Supply Voltage
  • Hysteretic-Logic Thresholds for High Noise
    Immunity
  • Inputs and Enable Pin-Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single-Supply Range
  • Outputs Held Low During VDD-UVLO, (Ensures
    Glitch-Free Operation at Power up and Power
    Down)
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between Two
    Channels
  • Two Outputs are in Parallel for Higher Drive
    Current
  • Outputs Held Low When Inputs Floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and
    3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13 ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provide the combination of three standard logic options – dual inverting, dual noninverting, one inverting and one noninverting driver. UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523, UCC27524, and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3-mm × 3-mm WSON-8 with exposed pad (DSD) packages. UCC27524 is also offered in PDIP-8 (P) package. UCC27526 is only offered in 3-mm × 3-mm WSON (DSD) package.

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13 ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provide the combination of three standard logic options – dual inverting, dual noninverting, one inverting and one noninverting driver. UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523, UCC27524, and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3-mm × 3-mm WSON-8 with exposed pad (DSD) packages. UCC27524 is also offered in PDIP-8 (P) package. UCC27526 is only offered in 3-mm × 3-mm WSON (DSD) package.
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UCC27524A ACTIVO Controlador de puerta de doble canal de 5 A/5 A con UVLO de 5 V, activación y manipulación de tensió This product is able to handle -5 V on its inputs, but otherwise is the exact same device.
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UCC27624 ACTIVO Controlador de puerta de doble canal de 5 A/5 A con UVLO de 4 V, VDD de 30 V y retardo de propagació Pin-to-pin, higher drive strength and voltage range and lower propagation delay

Documentación técnica

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Tipo Título Fecha
* Data sheet UCC2752x Dual 5-A High-Speed, Low-Side Gate Driver datasheet (Rev. G) PDF | HTML 01 abr 2015
Application note Selecting Gate Drivers for HVAC Systems PDF | HTML 04 abr 2024
Application note Why use a Gate Drive Transformer? PDF | HTML 04 mar 2024
Application note Static Magnet Power Supply Design for Magnetic Resonance Imaging Application PDF | HTML 22 ene 2024
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 nov 2021
More literature Troubleshooting gate drive circuits in automotive and industrial applications 23 mar 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Application note Improving Efficiency of DC-DC Conversion through Layout 07 may 2019
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 ene 2019
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 oct 2018
Selection guide Power Management Guide 2018 (Rev. R) 25 jun 2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16 mar 2018
More literature Design review of a 2-kW parallelable power supply module 17 ago 2016
More literature Design review of a 2-kW parallelable power supply module (PPT) 17 ago 2016
More literature Design Review of a Full-Featured 350-W Offline Power Converter 29 oct 2013

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

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Kit de desarrollo

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Modelo de simulación

UCC27524 PSpice Transient Model

SLUM243.ZIP (28 KB) - PSpice Model
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Modelo de simulación

UCC27524 SIMPLIS Transient

SLUM681.ZIP (15 KB) - Macromodels
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Modelo de simulación

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SLUM257.TSC (89 KB) - TINA-TI Reference Design
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Modelo de simulación

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Modelo de simulación

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Herramienta de cálculo

SLURB22 — UCC2752X Schematic Review Template

Productos y hardware compatibles

Productos y hardware compatibles

Productos
Drivers del lado de tierra
UCC27523 — Controlador de puerta de doble canal (5 A/5 A) con UVLO de 5 V, entradas de inversión y activación UCC27524 — Controlador de puerta de doble canal 5 A/5 A con UVLO de 5 V, activación y coincidencia de retardo d UCC27524A — Controlador de puerta de doble canal de 5 A/5 A con UVLO de 5 V, activación y manipulación de tensió UCC27524A-Q1 — Controlador de puerta de doble canal de 5 A/5 A con UVLO de 5 V y manipulación de tensión de entrada UCC27524A1-Q1 — Controlador de puerta de doble canal de 5 A/5 A con UVLO de 5 V y manipulación de tensión de entrada UCC27525 — Controlador de puerta de doble canal de 5 A/5 A con UVLO de 5 V, activación y entradas de inversión/ UCC27526 — Controlador de puerta de doble canal (5 A/5 A) con UVLO de 5 V, activación y entradas TTL dobles UCC27527 — Controlador de puerta de doble canal (5 A/5 A) con UVLO de 5 V, activación y entradas CMOS dobles UCC27528 — Controlador de puerta de doble canal (5 A/5 A) con UVLO de 5 V, entradas CMOS y activación UCC27528-Q1 — Controlador de puerta de doble canal (5 A/5 A) con UVLO de 5 V y entradas CMOS para automoción
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Paquete Pasadores Descargar
HVSSOP (DGN) 8 Ver opciones
PDIP (P) 8 Ver opciones
SOIC (D) 8 Ver opciones
WSON (DSD) 8 Ver opciones
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Pedidos y calidad

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  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
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  • Monitoreo continuo de confiabilidad
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