CDCLVP1102
- 1:2 Differential Buffer
- Single Clock Input
- Universal Inputs Can Accept LVPECL, LVDS,
LVCMOS/LVTTL - Two LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 33 mA
- Very Low Additive Jitter: <100 fs, RMS in 10-kHz
to 20-MHz Offset Range - 2.375-V to 3.6-V Device Power Supply
- Maximum Propagation Delay: 450 ps
- Maximum Output Skew: 10 ps
- LVPECL Reference Voltage, VAC_REF, Available
for Capacitive-Coupled Inputs - Industrial Temperature Range: –40°C to 85°C
- Supports 105°C PCB Temperature
(Measured at Thermal Pad) - Available in 3-mm × 3-mm QFN-16 (RGT) Package
- ESD Protection Exceeds 2 kV (HBM)
The CDCLVP1102 is a highly versatile, low additive jitter buffer that can generate two copies of LVPECL clock outputs from one LVPECL, LVDS, or LVCMOS input for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and overall output skew is as low as 10 ps, making the device a perfect choice for use in demanding applications.
The CDCLVP1102 clock buffer distributes a single clock input (IN) to two pairs of differential LVPECL clock outputs (OUT0, OUT1) with minimum skew for clock distribution. The inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.
The CDCLVP1102 is specifically designed for driving 50-Ω transmission lines. When driving the inputs in single-ended mode, the LVPECL bias voltage (VAC_REF) should be applied to the unused negative input pin. However, for high-speed performance up to 2 GHz, differential mode is strongly recommended.
The CDCLVP1102 is characterized for operation from 40°C to 85°C and is available in a QFN-16, 3-mm × 3-mm package.
기술 문서
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | CDCLVP1102 Two-LVPECL Output, High-Performance Clock Buffer datasheet (Rev. D) | PDF | HTML | 2015/12/11 |
EVM User's guide | CDCLVP1102EVM User's Guide | 2009/07/09 |
설계 및 개발
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CDCLVP1102EVM — CDCLVP1102 평가 모듈
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패키지 | 핀 | 다운로드 |
---|---|---|
VQFN (RGT) | 16 | 옵션 보기 |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.