TPS53689T
- Input voltage range: 4.5 V to 17 V
- Output voltage range: 0.25 V to 5.5 V
- Dual output supporting N+M phase configurations (N+M ≤ 8, M ≤ 4)
- Native trans-inductor voltage regulator (TLVR) topology support, with L C open and short protection
- Fully compatible with TI smart power stages
- Supports voltage- and current-source Imon power stages, with internal 1 kΩ resistor
- Support for traditional (legacy mode) and limp mode power stage fault identification
- Supports dual side power delivery with 12"+ trace length
- Intel VR14 SVID compliant with PSYS support
- Backward compatible to VR13.HC/VR13.0 SVID
- Automatic NVM fault status logging
- Enhanced D-CAP+ control to provider superior transient performance with excellent dynamic current sharing
- Dynamic phase shedding with programmable thresholds for optimizing efficiency at light and heavy loads
- Configurable with non-volatile memory (NVM) for low external component count
- Individual per-phase IMON calibration, with multi-slope gain calibration to increase system accuracy
- Diode braking with programmable timeout for reduced transient overshoot
- Programmable per-phase valley current limit (OCL)
- PMBus™ v1.3.1 system interface for telemetry of voltage, current, power, temperature, and fault conditions
- Programmable loop compensation through PMBus
- 5.00 mm × 5.00mm, 40-pin, QFN package
The TPS53689T is a VR14 SVID compliant step down controller with trans-inductor voltage regulator (TLVR) topology support, two channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI smart power stages. Advanced control features such as the D-CAP+ architecture provide fast transient response, low output capacitance, and good dynamic current sharing. Adjustable control of output voltage slew rate and adaptive voltage positioning are natively supported. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the host system. All programmable parameters can be configured through the PMBus interface and can be stored in NVM as the new default values, to minimize the external component count.
자세한 정보 요청
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기술 문서
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TPS53689T Dual-channel (N + M ≤ 8 phase) D-CAP+™, Step-down, Multiphase Controllers with TLVR support, PMBus and VR14 SVID Interfaces datasheet | PDF | HTML | 2023/09/13 |
설계 및 개발
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FUSION_DIGITAL_POWER_DESIGNER — 디지털 전원 소프트웨어
| 패키지 | 핀 | 다운로드 |
|---|---|---|
| WQFN (RSB) | 40 | 옵션 보기 |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치