전원 관리 AC/DC & DC/DC controllers (external FET)

UC3525B

활성

꺼졌을 때 낮은 출력을 지원하는 향상된 35V, 듀얼 0.4A 400KHz PWM 컨트롤러, 0C~70C

제품 상세 정보

Vin (max) (V) 40 Operating temperature range (°C) 0 to 70 Control mode Voltage Topology Boost, Buck, Flyback, Forward, Full bridge, Half bridge, Push pull Rating Catalog Duty cycle (max) (%) 49
Vin (max) (V) 40 Operating temperature range (°C) 0 to 70 Control mode Voltage Topology Boost, Buck, Flyback, Forward, Full bridge, Half bridge, Push pull Rating Catalog Duty cycle (max) (%) 49
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • 8 to 35V Operation
  • 5.1V Buried Zener Reference Trimmed to ±0.75%
  • 100Hz to 500kHz Oscillator Range
  • Separate Oscillator Sync Terminal
  • Adjustable Deadtime Control
  • Internal Soft-Start
  • Pulse-by-Pulse Shutdown
  • Input Undervoltage Lockout with Hysteresis
  • Latching PWM to Prevent Multiple Pulses
  • Dual Source/Sink Output Drivers
  • Low Cross Conduction Output Stage
  • Tighter Reference Specifications
  • 8 to 35V Operation
  • 5.1V Buried Zener Reference Trimmed to ±0.75%
  • 100Hz to 500kHz Oscillator Range
  • Separate Oscillator Sync Terminal
  • Adjustable Deadtime Control
  • Internal Soft-Start
  • Pulse-by-Pulse Shutdown
  • Input Undervoltage Lockout with Hysteresis
  • Latching PWM to Prevent Multiple Pulses
  • Dual Source/Sink Output Drivers
  • Low Cross Conduction Output Stage
  • Tighter Reference Specifications

The UC1525B/1527B series of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies. The on-chip +5.1V buried zener reference is trimmed to ±0.75% and the input common-mode range of the error amplifier includes the reference voltage, eliminating external resistors. A sync input to the oscillator allows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor between the CT and the discharge terminals provide a wide range of dead time adjustment. These devices also feature built-in soft-start circuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown commands. These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start capacitor discharged for subnormal input voltages. This lockout circuitry includes approximately 500mV of hysteresis for jitter-free operation. Another feature of these PWM circuits is a latch following the comparator. Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200mA. The UC1525B output stage features NOR logic, giving a LOW output for an OFF state. The UC1527B utilizes OR logic which results in a HIGH output level when OFF.

The UC1525B/1527B series of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies. The on-chip +5.1V buried zener reference is trimmed to ±0.75% and the input common-mode range of the error amplifier includes the reference voltage, eliminating external resistors. A sync input to the oscillator allows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor between the CT and the discharge terminals provide a wide range of dead time adjustment. These devices also feature built-in soft-start circuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown commands. These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start capacitor discharged for subnormal input voltages. This lockout circuitry includes approximately 500mV of hysteresis for jitter-free operation. Another feature of these PWM circuits is a latch following the comparator. Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200mA. The UC1525B output stage features NOR logic, giving a LOW output for an OFF state. The UC1527B utilizes OR logic which results in a HIGH output level when OFF.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
TL494 활성 40V, 0.2A 300KHz PWM 컨트롤러 Supports push-pull topology
UC2842A 활성 16V/10V UVLO 100% 듀티 사이클, 40C~85C의 30V, 1A, 500KHz 전류 모드 PWM 컨트롤러 Reduced startup current

기술 문서

star =TI에서 선정한 이 제품의 인기 문서
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모두 보기4
유형 직함 날짜
* Data sheet Regulating Pulse Width Modulators datasheet 1999/09/05
Selection guide Power Management Guide 2018 (Rev. R) 2018/06/25
Application note DN-36 UC1525B/UC1527B Devices - Comparison Summary to UC1525A/27A Devices 1999/09/05
Application note DN-62 Switching Power Supply Topology Voltage Mode vs. Current Mode 1999/09/05

설계 및 개발

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패키지 다운로드
PDIP (N) 16 옵션 보기
SOIC (DW) 16 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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