전원 관리 AC/DC & DC/DC controllers (external FET)

UCC27519A-Q1

활성

5V UVLO, 활성화 및 CMOS 입력을 지원하는 오토모티브 4A/4A 싱글 채널 게이트 드라이버

제품 상세 정보

Operating temperature range (°C) -40 to 125 Rating Automotive Input supply voltage (max) (V) 18 Input supply voltage (min) (V) 4.5 Number of channels 1
Operating temperature range (°C) -40 to 125 Rating Automotive Input supply voltage (max) (V) 18 Input supply voltage (min) (V) 4.5 Number of channels 1
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Automotive Qualified Grade 1: –40°C
      to +125°C Ambient Operating Temperature
      Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • Pin-to-Pin Compatible With TI’s TPSS2828-Q1
    and the TPS2829-Q1
  • 4-A Peak Source and 4-A Peak Sink Symmetrical
    Drive
  • Fast Propagation Delays (17-ns typical)
  • Fast Rise and Fall Times (8-ns and 7-ns typical)
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power-Up and Power-
    Down)
  • CMOS Input Logic Threshold (Function of Supply
    Voltage With Hysteresis)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • EN Pin for Enable Function (Allowed to be no
    Connect)
  • Ability to Support Negative Voltages (–5 V) at
    Input and Enable pins
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV Package (SOT-23)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Automotive Qualified Grade 1: –40°C
      to +125°C Ambient Operating Temperature
      Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • Pin-to-Pin Compatible With TI’s TPSS2828-Q1
    and the TPS2829-Q1
  • 4-A Peak Source and 4-A Peak Sink Symmetrical
    Drive
  • Fast Propagation Delays (17-ns typical)
  • Fast Rise and Fall Times (8-ns and 7-ns typical)
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power-Up and Power-
    Down)
  • CMOS Input Logic Threshold (Function of Supply
    Voltage With Hysteresis)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • EN Pin for Enable Function (Allowed to be no
    Connect)
  • Ability to Support Negative Voltages (–5 V) at
    Input and Enable pins
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV Package (SOT-23)

The UCC2751xA-Q1 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC2751xA-Q1 family of devices sources and sinks high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 17 ns.

The UCC2751xA-Q1 family of devices provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC2751xA-Q1 family of devices operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power-semiconductor devices.

The input pin threshold of the UCC2751xA-Q1 family of devices is based on CMOS logic where the threshold voltage is a function of the VDD supply voltage. Typically, the input high threshold (VIN–H) is 55% VDD and the input low threshold (VIN–L) is 39% VDD. Wide hysteresis (16% VDD typically) between the high and low thresholds offers excellent noise immunity and allows users to introduce delays using RC circuits between the input PWM signal and the INx pin of the device.

The UCC2751xA-Q1 family of devices also features a floatable enable function on the EN pin. The EN pin can be left in a no-connect condition, which allows pin-to-pin compatibility between the UCC2751xA-Q1 family of devices and the TPS2828-Q1 or TPS2829-Q1 device, respectively. The enable pin threshold is a fixed voltage threshold and does not vary based on VDD pin bias voltage. Typically, the enable high threshold (VEN-H) is 2.1 V and the enable low threshold (VEN-L) is 1.25 V.

The UCC2751xA-Q1 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC2751xA-Q1 family of devices sources and sinks high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 17 ns.

The UCC2751xA-Q1 family of devices provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC2751xA-Q1 family of devices operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power-semiconductor devices.

The input pin threshold of the UCC2751xA-Q1 family of devices is based on CMOS logic where the threshold voltage is a function of the VDD supply voltage. Typically, the input high threshold (VIN–H) is 55% VDD and the input low threshold (VIN–L) is 39% VDD. Wide hysteresis (16% VDD typically) between the high and low thresholds offers excellent noise immunity and allows users to introduce delays using RC circuits between the input PWM signal and the INx pin of the device.

The UCC2751xA-Q1 family of devices also features a floatable enable function on the EN pin. The EN pin can be left in a no-connect condition, which allows pin-to-pin compatibility between the UCC2751xA-Q1 family of devices and the TPS2828-Q1 or TPS2829-Q1 device, respectively. The enable pin threshold is a fixed voltage threshold and does not vary based on VDD pin bias voltage. Typically, the enable high threshold (VEN-H) is 2.1 V and the enable low threshold (VEN-L) is 1.25 V.

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기술 문서

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모두 보기5
유형 직함 날짜
* Data sheet UCC2751xA-Q1 Single-Channel High-Speed Low-Side Gate Driver With Negative Input Voltage Capability datasheet (Rev. B) PDF | HTML 2014/08/31
Functional safety information UCC27517A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 2021/06/16
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/02/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/02/28
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018/10/29

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 다운로드
SOT-23 (DBV) 5 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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