Home Logic & voltage translation Voltage translators & level shifters Fixed-direction voltage translators
Home
Logic & voltage translation
Voltage translators & level shifters
Fixed-direction voltage translators

SN74AVC4T234

ACTIVE

4-bit dual-supply bus transceiver with config voltage translation

Order now
Data sheet

SN74AVC4T234

ACTIVE
Data sheet Order now

Product details

Technology family AVC Applications JTAG Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.9 High input voltage (max) (V) 3.6 Vout (min) (V) 0 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 3.6 Features 2.8 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AVC Applications JTAG Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.9 High input voltage (max) (V) 3.6 Vout (min) (V) 0 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 3.6 Features 2.8 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (ZWA) 11 2.8 mm² 2 x 1.4
  • Wide operating VCC range of 0.9 V to 3.6 V
  • 3.6-V I/O Tolerant to support mixed-mode signal operation
  • Max tpd of 3.7 ns at 3.3 V
  • Balanced propagation delays: tPLH = tPHL
  • Low static-power consumption, 5-µA Max ICC
  • Outputs disabled if either VCC goes to 0V
  • ±3-mA Output drive at 1.8 V
  • 26-Ω series resistor on A-side outputs
  • Ioff supports partial power-down-mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at input
  • Maximum data rates
    • 380 Mbps (1.8-V to 3.3-V translation)
    • 200 Mbps (<1.8-V to 3.3-V translation)
    • 200 Mbps (translate to 2.5 V or 1.8 V)
    • 150 Mbps (translate to 1.5 V)
    • 100 Mbps (translate to 1.2 V)
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 500-V charged-device model (C101)
  • Wide operating VCC range of 0.9 V to 3.6 V
  • 3.6-V I/O Tolerant to support mixed-mode signal operation
  • Max tpd of 3.7 ns at 3.3 V
  • Balanced propagation delays: tPLH = tPHL
  • Low static-power consumption, 5-µA Max ICC
  • Outputs disabled if either VCC goes to 0V
  • ±3-mA Output drive at 1.8 V
  • 26-Ω series resistor on A-side outputs
  • Ioff supports partial power-down-mode operation
  • Input hysteresis allows slow input transition and better switching noise immunity at input
  • Maximum data rates
    • 380 Mbps (1.8-V to 3.3-V translation)
    • 200 Mbps (<1.8-V to 3.3-V translation)
    • 200 Mbps (translate to 2.5 V or 1.8 V)
    • 150 Mbps (translate to 1.5 V)
    • 100 Mbps (translate to 1.2 V)
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 500-V charged-device model (C101)

This 4-bit non-inverting bus transceiver uses two separate configurable power-supply rails to enable asynchronous communication between B-port inputs and A-port outputs. The A port is designed to track VCCA while the B port is designed to track VCCB. Both VCCA and VCCB are configurable from 0.9 V to 3.6 V.

The SN74AVC4T234 solution offers the industry’s low-power needs in battery-powered portable applications by ensuring both a very low static and dynamic power consumption across the entire VCC range of 0.9 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then A-side ports are in the high-impedance state.

This 4-bit non-inverting bus transceiver uses two separate configurable power-supply rails to enable asynchronous communication between B-port inputs and A-port outputs. The A port is designed to track VCCA while the B port is designed to track VCCB. Both VCCA and VCCB are configurable from 0.9 V to 3.6 V.

The SN74AVC4T234 solution offers the industry’s low-power needs in battery-powered portable applications by ensuring both a very low static and dynamic power consumption across the entire VCC range of 0.9 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then A-side ports are in the high-impedance state.
filter Find other Fixed-direction voltage translators
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Same functionality with different pin-out to the compared device
TXU0104 ACTIVE Four channel unidirectional level shifter Similar product with a higher voltage operating range

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 16
Type Title Date
* Data sheet SN74AVC4T234 4-Bit Dual-Supply Bus Transceiver With Config Voltage Translation datasheet (Rev. B) 01 Jul 2020
Application note Understanding Transient Drive Strength vs. DC Drive Strength in CMOS Output Buffers PDF | HTML 14 May 2024
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
More literature Voltage-Level Translation Guide (Rev. H) 31 Aug 2015
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 30 Apr 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
More literature LCD Module Interface Application Clip 09 May 2003
User guide AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) 20 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) 07 Jul 1999
Application note AVC Logic Family Technology and Applications (Rev. A) 26 Aug 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

SN74AVC4T234 IBIS MODEL

SCEM541.ZIP (64 KB) - IBIS Model
Download
Package Pins Download
NFBGA (ZWA) 11 View options
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos