DS100DF410
- Each Channel Independently Locks to 10.3125 Gbps
- Lock Operation (typically under 15 ms)
- Low Latency (∼300 ps)
- Adaptive Equalization up to 34 dB Boost at 5 GHz
- Adjustable Transmit VOD: 600 to 1300 mVp-p
- Adjustable Transmit De-emphasis to –12 dB
- Typical Power Dissipation (EQ+DFE+CDR+DE): 180 mW/channel
- Programmable Output Polarity Inversion
- Input Signal Detection, CDR Lock Detection/Indicator
- On-chip Eye Monitor (EOM), PRBS Generator
- Single 2.5 V ±5% Power Supply
- SMBus/EEPROM Configuration Modes
- Operating Temperature Range of –40°C to 85°C
- WQFN 48-Pin, 7 mm × 7 mm Package
- Easy Pin Compatible Upgrade Between Repeater and Retimers
- DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
- DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps
- DS110RT410 (EQ+CDR+DE): 8.5–11.3 Gbps
- DS110DF410 (EQ+DFE+CDR+DE): 8.5–11.3 Gbps
- DS125RT410 (EQ+CDR+DE): 9.8–12.5 Gbps
- DS125DF410 (EQ+DFE+CDR+DE): 9.8–12.5 Gbps
- DS100BR410 (EQ+DE): Up to 10.3125 Gbps
The DS100DF410 is four channel retimers with integrated signal conditioning. Each channel can independently lock to 10.3125 Gbps data rate to support 10GbE. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), Clock and Data Recovery (CDR) and transmit De-Emphasis (DE) driver. The DS100DF410 also includes a self calibrating 5-tap Decision Feedback Equalizer (DFE) to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15.
The programmable settings can be applied easily using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning. Flow-through pinout and single power supply make the DS100DF410 easy to use.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS100DF410 Low Power 10GbE Quad Channel Retimer datasheet (Rev. B) | PDF | HTML | 2015年 1月 8日 |
| Application note | Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications (Rev. A) | 2023年 1月 31日 | ||
| Application note | Implementing TI Retimers on 10G ZR and DWDM SFP+ Optical Links | 2019年 4月 8日 | ||
| Application brief | DS110DF111,DS125DF111, DS100DF410, DS110DF410, and DS125DF410 Programming Guide | 2019年 3月 25日 | ||
| EVM User's guide | DS100DF410EVK, DS110DF410EVK, DS125DF410EVM User's Guide (Rev. C) | 2016年 6月 22日 | ||
| Application note | Understanding EEPROM Programming for 10G to 12.5G Retimers | 2016年 1月 13日 | ||
| Application note | Selecting TI SigCon Devices for SFF-8431 SFP+ Applications | 2014年 5月 6日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
DS100DF410EVK — DS100DF410EVK 評估板
The DS100DF410EVK evaluation board allows the user to examine the advanced signal conditioning capabilities of the DS100DF410 and DS100RT410 devices using SMAs. The board is controlled by a PC using a USB port and the SigCon Architect GUI.
In order to use the SigCon Architect GUI to control the (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 引腳 | 下載 |
|---|---|---|
| WQFN (RHS) | 48 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。