Product details


Type Retimer Number of channels (#) 4 Input compatibility AC-coupling, CML Speed (Max) (Gbps) 10.3 Protocols 10G-SR/LR, 40G-SR4/LR4, Infiniband, General purpose Operating temperature range (C) -40 to 85 open-in-new Find other Ethernet retimers, redrivers & mux-buffers

Package | Pins | Size

WQFN (RHS) 48 49 mm² 7 x 7 open-in-new Find other Ethernet retimers, redrivers & mux-buffers


  • Each Channel Independently Locks to
    10.3125 Gbps
  • Lock Operation (Typically Under 15 ms)
  • Low Latency (≈ 300 ps)
  • Adaptive Equalization up to 34-dB Boost at 5 GHz
  • Adjustable Transmit VOD: 600 to 1300
  • Adjustable Transmit De-emphasis to –12 dB
  • Typical Power Dissipation (EQ+CDR+DE):
    150 mW/channel
  • Programmable Output Polarity Inversion
  • Input Signal Detection, CDR Lock Detection and
  • On-chip Eye Monitor (EOM), PRBS Generator
  • Single 2.5 V ±5% Power Supply
  • SMBus and EEPROM Configuration Modes
  • Operating Temperature Range of –40°C to 85°C
  • WQFN 48-Pin, 7 mm × 7 mm Package
  • Easy Pin Compatible Upgrade Between Repeater
    and Retimers
    • DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
    • DS100DF410 (EQ+DFE+CDR+DE):
      10.3125 Gbps
    • DS110RT410 (EQ+CDR+DE): 8.5 to
      11.3 Gbps
    • DS110DF410 (EQ+DFE+CDR+DE): 8.5 to
      11.3 Gbps
    • DS125RT410 (EQ+CDR+DE): 9.8 to
      12.5 Gbps
    • DS125DF410 (EQ+DFE+CDR+DE):
      9.8 to 12.5 Gbps
    • DS100BR410 (EQ+DE): Up to
      10.3125 Gbps
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The DS100RT410 is a four-channel retimer with integrated signal conditioning. Each channel can independently lock to 10.3125-Gbps data rate to support 10 GbE. The device includes a fully adaptive continuous-time linear equalizer (CTLE), clock and data recovery (CDR) and a transmit de-emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1 × 10–15. For channels with a high amount of crosstalk, the DS100DF410 should be used because it has self-calibrating 5-tap decision-feedback equalizer (DFE).

The programmable settings can be applied easily using the SMBus (I2C) interface, or they can be loaded through an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning. Flow-through pinout and single power supply make the DS100RT410 easy to use.

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Technical documentation

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Type Title Date
* Data sheet DS100RT410 Low-Power 10-GbE Quad Channel Retimer datasheet (Rev. A) Oct. 27, 2015
User guide DS100DF410EVK, DS110DF410EVK, DS125DF410EVM User's Guide (Rev. C) Jun. 22, 2016
Application note 2Q 2016 Analog Applications Journal Issue Apr. 26, 2016
Application note The intricacies of signal integrity in high-speed communications Apr. 26, 2016
Application note Understanding EEPROM Programming for 10G to 12.5G Retimers Jan. 13, 2016
Technical article Challenges in high-speed communications Jun. 13, 2014
Application note Selecting TI SigCon Devices for SFF-8431 SFP+ Applications May 06, 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The DS100DF410EVK evaluation board allows the user to examine the advanced signal conditioning capabilities of the DS100DF410 and DS100RT410 devices using SMAs. The board is controlled by a PC using a USB port and the SigCon Architect GUI.

In order to use the SigCon Architect GUI to control the (...)

  • Each channel independently locks to
    • 10.3125 Gbps (DS100DF410)
    • 8.5 to 11.3 Gbps (DS110DF410)
    • 9.8 - 12.5 Gbps (DS125DF410)
    • and sub-multiples of the data rates
  • Lock time operation (typically under 15 ms)
  • Low latency (~300 ps)
  • Adaptive equalization up to 34 dB boost at 5 Gbps GHz
  • Adjustable transmit VOD : 600 (...)

Design tools & simulation

SNLM143.PDF (25 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
WQFN (RHS) 48 View options

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