TLC2932

不推薦在新設計中採用

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立即訂購

產品規格表

document-pdfAcrobat High-Performance Phase-Locked Loop datasheet (Rev. E) (英文)

TLC2932

不推薦在新設計中採用

產品規格表

立即訂購

產品詳細資料

Function

Zero-delay

Operating temperature range (°C)

to

Rating

Catalog

Function

Zero-delay

Operating temperature range (°C)

to

Rating

Catalog

TSSOP (PW)

14

32 mm² 5 x 6.4

Voltage-Controlled Oscillator (VCO) Section:
- Complete Oscillator Using Only One
  External Bias Resistor (R_BIAS)
- Lock Frequency:
  22 MHz to 50 MHz (V_DD = 5 V ±5%,
  T_A = -20°C to 75°C, ×1 Output)
  11 MHz to 25 MHz (V_DD = 5 V ±5%,
  T_A = -20°C to 75°C, ×1/2 Output)
- Output Frequency...×1 and ×1/2
  Selectable
Phase-Frequency Detector (PFD) Section Includes a High-Speed Edge-Triggered Detector With Internal Charge Pump
Independent VCO, PFD Power-Down Mode
Thin Small-Outline Package (14 terminal)
CMOS Technology
Typical Applications:
- Frequency Synthesis
- Modulation/Demodulation
- Fractional Frequency Division
Application Report Available
CMOS Input Logic Level

TLC2932 Phase-Locked-Loop Building Block With Analog Voltage-Controlled Oscillator and Phase Frequency Detector (SLAA011).

Voltage-Controlled Oscillator (VCO) Section:
- Complete Oscillator Using Only One
  External Bias Resistor (R_BIAS)
- Lock Frequency:
  22 MHz to 50 MHz (V_DD = 5 V ±5%,
  T_A = -20°C to 75°C, ×1 Output)
  11 MHz to 25 MHz (V_DD = 5 V ±5%,
  T_A = -20°C to 75°C, ×1/2 Output)
- Output Frequency...×1 and ×1/2
  Selectable
Phase-Frequency Detector (PFD) Section Includes a High-Speed Edge-Triggered Detector With Internal Charge Pump
Independent VCO, PFD Power-Down Mode
Thin Small-Outline Package (14 terminal)
CMOS Technology
Typical Applications:
- Frequency Synthesis
- Modulation/Demodulation
- Fractional Frequency Division
Application Report Available
CMOS Input Logic Level

TLC2932 Phase-Locked-Loop Building Block With Analog Voltage-Controlled Oscillator and Phase Frequency Detector (SLAA011).

The TLC2932I is designed for phase-locked-loop (PLL) systems and is composed of a voltage-controlled oscillator (VCO) and an edge-triggered-type phase frequency detector (PFD). The oscillation frequency range of the VCO is set by an external bias resistor (R_BIAS). The VCO has a 1/2 frequency divider at the output stage. The high-speed PFD with internal charge pump detects the phase difference between the reference frequency input and signal frequency input from the external counter. Both the VCO and the PFD have inhibit functions, which can be used as a power-down mode. The TLC2932I is suitable for use as a high-performance PLL due to the high speed and stable oscillation capability of the device.

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檢視所有 3

	類型	標題	日期
*	Data sheet	High-Performance Phase-Locked Loop datasheet (Rev. E)	1997年 5月 12日
	User guide	TLC2932 Evaluation Module Technical Reference (Rev. A)	1997年 10月 2日
	Application note	TLC2932 PLL Building Block w/ Analog Voltage-Controlled Oscillator (Rev. B)	1997年 9月 18日

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TLC2932

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