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TPS7H1201-HT
- Wide VIN Range: 1.5 V to 7 V
- Current Share/Parallel Operation to Provide Higher Output Current
- Stable With Ceramic Output Capacitor
- ±4.2% Accuracy Over Line, Load, and Temperature
- Programmable Soft-Start
- Power-Good Output
- LDO Voltage:
100 mV (Max) at 0.5 A (210°C), VOUT = 6.8 V - Low Noise:
20.26 µVRMS VIN = 2.1 V, VOUT = 1.8 V at 0.5 A - PSRR: Over 45 dB at 1 kHz
- Load/Line Transient Response
- See the Tools & Software Tab
The TPS7H1201-HT is a LDO linear regulator that uses a PMOS pass element configuration. This device operates over a wide range of input voltage, from 1.5 V to 7 V while offering excellent PSRR.
The TPS7H1201-HT features a precise and programmable foldback current limit implementation with a very-wide adjustment range. To support the complex power requirements of FPGAs, DSPs, or microcontrollers, the TPS7H1201-HT provides enable on and off functionality, programmable SoftStart, current sharing capability, and a PowerGood open-drain output.
The TPS7H1201-HT is available in a thermally-enhanced 16-pin ceramic flatpack package (CFP) and KGD (bare die) package.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS7H1201-HT 1.5-V to 7-V Input, Ultra-Low Dropout (LDO) Regulator datasheet (Rev. J) | PDF | HTML | 2017年 4月 5日 |
| EVM User's guide | TPS7H1201HTEVM (Rev. A) | 2013年 9月 19日 |
設計與開發
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TPS7H1201HTEVM — TPS7H1201HTEVM 評估模組
The TPS7H1201-HT is a Ultra Low Dropout (LDO) linear regulator that uses a PMOS pass element configuration. The techniques employed allow for very low dropout. With an improved circuitry the TPS7H1201 operates under wide range of input voltage, from 1.5 V to 7 V which enables 6-V IN to 5-V OUT or (...)
| 封裝 | 引腳 | 下載 |
|---|---|---|
| CFP (HKS) | 16 | 檢視選項 |
| DIESALE (KGD) | — |
訂購與品質
- RoHS
- REACH
- 產品標記
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- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
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