UCC21220

現行

適用於 MOSFET 和 GaNFET 且具有停用針腳和 8V UVLO 的 3.0kVrms、4A/6A 雙通道隔離式閘極驅動器

產品詳細資料

Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5, 8
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Supports basic and functional isolation
  • CMTI greater than 100V/ns
  • 4A peak source, 6A peak sink output
  • Switching parameters:
    • 40ns maximum propagation delay
    • 5ns maximum delay matching
    • 5.5ns maximum pulse-width distortion
    • 35µs maximum VDD power-up delay
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Operating temperature range (TA) –40°C to 125°C
  • Narrow body SOIC-16 (D) package
  • Rejects input pulses shorter than 5ns
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1 (planned)
    • 3000VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011 (planned)
  • Supports basic and functional isolation
  • CMTI greater than 100V/ns
  • 4A peak source, 6A peak sink output
  • Switching parameters:
    • 40ns maximum propagation delay
    • 5ns maximum delay matching
    • 5.5ns maximum pulse-width distortion
    • 35µs maximum VDD power-up delay
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Operating temperature range (TA) –40°C to 125°C
  • Narrow body SOIC-16 (D) package
  • Rejects input pulses shorter than 5ns
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1 (planned)
    • 3000VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011 (planned)

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 100V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, INA/B pin rejects input transient shorter than 5ns, both inputs and outputs can withstand –2V spikes for 200ns, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2.1V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 100V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, INA/B pin rejects input transient shorter than 5ns, both inputs and outputs can withstand –2V spikes for 200ns, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2.1V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

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UCC21222 現行 具有停用針腳、可編程失效時間和 8V UVLO 的 3.0kVrms、4A/6A 雙通道隔離式閘極驅動器 Supports programmable dead-time

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類型 標題 日期
* Data sheet UCC21220, UCC21220A 4A, 6A, Dual-Channel Basic and Functional Isolated Gate Drivers with High Noise Immunity datasheet (Rev. F) PDF | HTML 2024年 2月 2日
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 2024年 1月 31日
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 2024年 1月 25日
Certificate UCC21220 CQC Certificate of Product Certification (Malaysia) 2023年 8月 29日
Certificate UCC21220 CQC Certificate of Product Certification 2023年 8月 16日
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021年 12月 16日
Test report Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design 2020年 4月 24日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
E-book E-book: An engineer’s guide to industrial robot designs 2020年 2月 12日
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 2019年 7月 22日
User guide Gate Drive Voltage vs. Efficiency 2019年 4月 25日
Application brief How to Drive High Voltage GaN FETs with UCC21220A 2019年 3月 6日
White paper Impact of an isolated gate driver (Rev. A) 2019年 2月 20日
Application note Common Mode Transient Immunity (CMTI) for UCC2122x Isolated Gate Drivers 2018年 7月 19日
White paper Demystifying high-voltage power electronics for solar inverters 2018年 6月 6日
Application note Solar Inverter Layout Considerations for UCC21220 2018年 6月 6日
Technical article Boosting efficiency for your solar inverter designs PDF | HTML 2018年 5月 24日
EVM User's guide UCC21220EVM-009 User's Guide (Rev. B) 2018年 4月 12日
Technical article Why capacitive isolation: a vital building block for sensors in smart cities PDF | HTML 2018年 1月 16日
Technical article Making a solar inverter more reliable than the sun PDF | HTML 2017年 8月 1日

設計與開發

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開發板

UCC21220EVM-009 — UCC21220 4A、6A 3.0kVRMS 隔離式雙通道閘極驅動器評估模組

UCC21220EVM-009 is designed for evaluating UCC21220, which is a 3.0-kVRMS Isolated Dual-Channel Gate Driver with 4.0-A source and 6.0-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection (...)
使用指南: PDF
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模擬型號

UCC21220AD PSpice Transient Model

SLUM649.ZIP (58 KB) - PSpice Model
模擬型號

UCC21220AD Unencrypted PSpice Transient Model

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模擬型號

UCC21220D PSpice Transient Model

SLUM602.ZIP (51 KB) - PSpice Model
模擬型號

UCC21220D Unencrypted PSpice Transient Model

SLUM603.ZIP (3 KB) - PSpice Model
計算工具

SLURAZ5 UCC21520 Bootstrap Calculator 1.0

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產品
隔離式閘極驅動器
UCC21220 適用於 MOSFET 和 GaNFET 且具有停用針腳和 8V UVLO 的 3.0kVrms、4A/6A 雙通道隔離式閘極驅動器 UCC21222 具有停用針腳、可編程失效時間和 8V UVLO 的 3.0kVrms、4A/6A 雙通道隔離式閘極驅動器 UCC21520 採用 DW 封裝且具有雙輸入、停用針腳、8V UVLO 的 5.7kVrms、4A/6A 雙通道絕緣式閘極驅動器 UCC21521 採用雙輸入、啟用功能、8V UVLO 和 LGA 封裝的 5.7kVrms、4A/6A 雙通道絕緣式閘極驅動器
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
參考設計

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此參考設計是一款氮化鎵 (GaN) 架構的 3.6kW、單相連續傳導模式 (CCM) 圖騰柱無橋接功率因數校正 (PFC) 轉換器,其以 M-CRPS 電源為目標。此設計包括準確度為 0.5% 的電表功能,不再需要外部電源量測 IC。供應器的設計可支援 16A RMS 最大輸入電流及 3.6kW 峰值功率。功率級之後配備了一個小型升壓轉換器,有助於大幅縮減大型電容器的尺寸。具整合式驅動器與防護的 LMG3522 頂端冷卻 GaN 產品可實現更高效率,並可縮減電源供應器尺寸和複雜性。F28003x C2000™ 即時微控制器適用所有進階控制件,包括重新突波電流控制、在 AC (...)
Test report: PDF
參考設計

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此參考設計展示了使用 C2000 F28003x 和 F28004x 微控制器控制連續導通模式圖騰柱功率因數校正轉換器 (PFC) 的方法。PFC 在電網連接 (電流控制) 模式下也可用作逆變器。轉換器的設計可支援 16-ARMS 最大輸入電流及 3.6 kW 最大功耗。具整合式驅動器與防護的 LMG3522 頂端冷卻 GaN 產品可實現更高效率,並可縮減電源供應器尺寸和複雜性。基於 F28004x 或 F28002x 的 C2000 控制器可用於所有進階控制,例如快速繼電器控制和反向電流保護。此設計支援適應性失效時間以提升效率、在輕負載情況下加強功率因數的輸入電容方案,以及在 PFC (...)
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參考設計

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Test report: PDF
電路圖: PDF
參考設計

PMP40500 — 54-VDC 輸入、12-V 42-A 輸出半橋參考設計

此 12-V、42-A 輸出半橋式參考設計適合有線網路園區與分公司交換器中的匯流排轉換器。此設計具高效率及各種故障保護 (過電流和短路)。設計採用 3 kVRMS 基本及功能隔離式閘極驅動器 UCC21220D、UCC21220AD、UCC21222D,及 5.7-kRMS 強化隔離式閘極驅動器 UCC21540D、UCC21540DWK 及 UCC21541DW 以提供效率比較。
Test report: PDF
電路圖: PDF
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