SNAS279F April 2005 – July 2016 ADC084S021
is the time required to acquire the input voltage. That is, it is time required for the hold capacitor to charge up to the input voltage.
is the time between the fourth falling SCLK edge of a conversion and the time when the input signal is acquired or held for conversion.
is the time required, after the input voltage is acquired, for the ADC to convert the input voltage to a digital word.
is the coupling of energy from one channel into the other channel, or the amount of signal energy from one analog input that appears at the measured analog input.
is the measure of the maximum deviation from the ideal step size of 1 LSB.
is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The specification here refers to the SCLK.
is another method of specifying Signal-to-Noise and Distortion or SINAD. ENOB is defined as (SINAD − 1.76) / 6.02 and says that the converter is equivalent to a perfect ADC of this (ENOB) number of bits.
is a measure of the frequency at which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input.
is a measure of how far the last code transition is from the ideal 1½ LSB below VREF+ and is defined with Equation 1.
is the deviation of the last code transition (111...110) to (111...111) from the ideal (VREF − 1.5 LSB), after adjusting for offset error.
is a measure of the deviation of each individual code from a line drawn from negative full scale (½ LSB below the first code transition) through positive full scale (½ LSB above the last code transition). The deviation of any given code from this straight line is measured from the center of that code value.
is the creation of additional spectral components as a result of two sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in the second and third order intermodulation products to the sum of the power in both of the original frequencies. IMD is usually expressed in dB.
are those output codes that never appears at the ADC outputs. These codes cannot be reached with any input value. The ADC084S021 is ensured not to have any missing codes.
is the deviation of the first code transition (000...000) to (000...001) from the ideal (that is, GND + 0.5 LSB).
is the ratio, expressed in dB, of the rms value of the input signal at the converter output to the rms value of the sum of all other spectral components below one-half the sampling frequency, not including DC or harmonics included in the THD specification.
is the ratio, expressed in dB, of the rms value of the input signal to the rms value of all of the other spectral components below half the clock frequency, including harmonics but excluding dc
is the difference, expressed in dB, between the rms values of the input signal and the peak spurious signal where a spurious signal is any signal present in the output spectrum that is not present at the input, excluding dc
is the ratio, expressed in dB or dBc, of the rms total of the first five harmonic components at the output to the rms level of the input signal frequency as seen at the output. THD is calculated with Equation 2.
is the minimum time required between the start of two successive conversion. It is the acquisition time plus the conversion and read out times. In the case of the ADC084S021, this is 16 SCLK periods.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.