SLVSEO0B August 2021 – February 2023 ADC12DJ4000RF
PRODUCTION DATA
The TMSTP+ and TMSTP– differential input can be used as a time-stamp input to mark a specific sample based on the timing of an external trigger event relative to the sampled signal. TIMESTAMP_EN (see the LSB control bit output register) must be set in order to use the timestamp feature and output the timestamp data. When enabled, the LSB of the 12-bit ADC digital output reports the status of the TMSTP± input. In effect, the 12-bit output sample consists of the upper 11-bits of the 12-bit converter and the LSB of the 12-bit output sample is the output of a parallel 1-bit converter (TMSTP±) with the same latency as the ADC core. In the 8-bit operating modes, the LSB of the 8-bit output sample is used to output the timestamp status. The trigger must be applied to the differential TMSTP+ and TMSTP– inputs. The trigger can be asynchronous to the ADC sampling clock and is sampled at approximately the same time as the analog input. Timestamp cannot be used when a JMODE with decimation is selected and instead SYSREF must be used to achieve synchronization through the JESD204C subclass-1 method for achieving deterministic latency.