SBAS774B May 2016 – December 2021 ADC32RF80 , ADC32RF83
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | DDC MUX |
| W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | R/W-0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-1 | 0 | W | 0h | Must write 0 |
| 0 | DDC MUX | R/W | 0h | This bit connects the DDC to the alternate channel ADC to enable up to four DDCs with one ADC and completely turn off the other ADC channel. 0 = Normal operation 1 = DDC block takes input from the alternate ADC |