The decimation filter and power detector pages are special pages that accept direct addressing. The sampling clock and SYSREF signal are required to properly configure the decimation settings. Registers located in these pages can be programmed in one SPI cycle (Figure 8-63).
- Drive the SEN pin low.
- Directly write to the decimation filter or power detector pages. To program registers in these pages, set M = 1 and CH = 1. Additionally, address bit A[10] selects the decimation filter page (A[10] = 0) or the power detector page (A[10] = 1). Address bit A[11] selects channel A (A[11] = 0) or channel B (A[11] = 1).
- Decimation filter page: write address 50xxh for channel A or 58xxh for channel B.
- Power detector page: write address 54xxh for channel A or 5Cxxh for channel B.
Example: Writing address 5001h with 02h selects the decimation filter page for channel A and programs decimation factor of divide-by-8 (complex output).