11.1 Layout Guidelines
- A copper fill area underneath the device ties the AGND, BDGND, AINM, and REFM pins together. This copper fill area must also be connected to the analog ground plane of the PCB using at least four vias.
- The power sources must be clean and properly decoupled by placing a capacitor close to each of the three supply pins, as shown in Figure 69 and Figure 70. To minimize ground inductance, ensure that each capacitor ground pin is connected to a grounding via by a very short and thick trace.
- The REFP pin requires a 10-μF ceramic capacitor to meet performance specifications. Place the capacitor directly next to the device. This capacitor ground pin must be routed to the REFM pin by a very short trace, as shown in Figure 69 and Figure 70.
- Do not place any vias between a capacitor pin and a device pin.
The full-power bandwidth of the converter makes the ADC sensitive to high frequencies in digital lines. Organize components in the PCB by keeping digital lines apart from the analog signal paths. This design configuration is critical to minimize crosstalk. For example, in Figure 69, input drivers are expected to be on the left of the converter and the microcontroller on the right.