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Product details

Parameters

Resolution (Bits) 8 Number of input channels 8 Sample rate (Max) (kSPS) 1000 Interface type SPI Architecture SAR Input type Single-Ended Multi-channel configuration Multiplexed Rating Catalog Reference mode Ext Input range (Max) (V) 5.25 Input range (Min) (V) 0 Features Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 11.5 Analog voltage AVDD (Min) (V) 2.7 SNR (dB) 49 Analog voltage AVDD (Max) (V) 5.25 INL (Max) (+/-LSB) 0.3 Digital supply (Min) (V) 1.7 Digital supply (Max) (V) 5.25 open-in-new Find other Precision ADCs (<=10MSPS)

Package | Pins | Size

TSSOP (DBT) 30 34 mm² 4.4 x 7.8 VQFN (RGE) 24 16 mm² 4 x 4 open-in-new Find other Precision ADCs (<=10MSPS)

Features

  • 1-MHz Sample Rate Serial Devices
  • Product Family of 12-, 10-, 8-Bit Resolution
  • Zero Latency
  • 20-MHz Serial Interface
  • Analog Supply Range: 2.7 to 5.25 V
  • I/O Supply Range: 1.7 to 5.25 V
  • Two SW Selectable Unipolar, Input Ranges: 0 to VREF and 0 to 2 x VREF
  • Auto and Manual Modes for Channel Selection
  • 4-, 8-Channel Devices and 12-, 16-Channel Devices Share the Same Footprint
  • Two Programmable Alarm Levels per Channel
  • Four Individually Configurable GPIOs in TSSOP Package: One GPIO in VQFN Package
  • Typical Power Dissipation: 14.5 mW (+VA = 5 V, +VBD = 3 V) at 1 MSPS
  • Power-Down Current (1 µA)
  • Input Bandwidth (47 MHz at 3 dB)
  • 38-, 30-Pin TSSOP and 32-, 24-Pin VQFN Packages

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Description

The ADS79xx is a 12-, 10-, 8-bit pin compatible multichannel analog-to-digital converter family. The device comparison table shows all twelve devices from this product family.

The devices include a capacitor based SAR A/D converter with inherent sample and hold.

The devices accept a wide analog supply range from 2.7 V to 5.25 V. Very low power consumption makes these devices suitable for battery-powered and isolated power-supply applications.

A wide 1.7-V to 5.25-V I/O supply range facilitates a glueless interface with the most commonly used digital hosts. The serial interface is controlled by CS and SCLK for easy connection with microprocessors and DSP.

The input signal is sampled with the falling edge of CS. It uses SCLK for conversion, serial data output, and reading serial data in. The devices allow auto sequencing of preselected channels or manual selection of a channel for the next conversion cycle.

There are two software selectable input ranges (0 V to VREF and 0 V to 2 × VREF), individually configurable GPIOs (four in case of the TSSOP and one on the VQFN package devices), and two programmable alarm thresholds per channel. These features make the devices suitable for most data acquisition applications.

The devices offer an attractive power-down feature. This is extremely useful for power saving when the device is operated at lower conversion speeds.

The 16-, 12-channel devices from this family are available in a 38-pin TSSOP and 32 pin VQFN package and the 4/8-channel devices are available in a 30-pin TSSOP and 24 pin VQFN packages.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet ADS79xx Pin Compatible, 12-, 10-, 8-Bit, 1-MSPS, 16-, 12-, 8-, 4-Channel, Single-Ended, Serial Interface ADCs datasheet (Rev. C) Jul. 24, 2018
User guides ADS79xxEVM/ADS79xxEVM-PDK User's Guide (Rev. D) Feb. 02, 2016
White papers Best of Baker's Best: Precision Data Converters -- SAR ADCs May 21, 2015
Application notes Determining Minimum Acquisition Times for SAR ADCs, part 2 Mar. 17, 2011
Application notes Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) Nov. 10, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODELS Download
SBAM022.ZIP (67 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
CALCULATION TOOLS Download
Analog-to-digital converter (ADC) input driver design tool supporting multiple input types
ADC-INPUT-CALC ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and transformer-coupled (...)
CALCULATION TOOLS Download
Analog engineer's calculator
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
  • Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
    • Noise calculations
    • Common unit translation
  • Solves common amplifier circuit design problems
    • Gain selections using standard resistors
    • Filter configurations
    • Total noise for common amplifier configurations
  • (...)

CAD/CAE symbols

Package Pins Download
TSSOP (DBT) 30 View options
VQFN (RGE) 24 View options

Ordering & quality

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