SBAS629B October 2015 – June 2017 ADS9110
The device has two separate power supplies: AVDD and DVDD. The internal circuits of the device operate on AVDD; DVDD is used for the digital interface. AVDD and DVDD can be independently set to any value within the permissible range.
The AVDD and DVDD supply pins cannot share the same decoupling capacitor. As shown in Figure 102, separate 1-μF ceramic capacitors are recommended. These capacitors avoid digital and analog supply crosstalk resulting from dynamic currents during conversion and data transfer.
In normal mode of operation, the device does not power down between conversions, and therefore achieves a high throughput of 2 MSPS. However, the device offers two programmable low-power modes (NAP and PD) to reduce power consumption when the device is operated at lower throughput rates. Figure 103 shows comparative power consumption between the different modes of the device.
In NAP mode, some of the internal blocks of the device power down to reduce power consumption in the ACQ state.
To enable NAP mode, set the NAP_EN bit in the PD_CNTL register. To exercise NAP mode, keep the CONVST pin high at the end of conversion process. The device then enters NAP mode at the end of conversion and continues in NAP mode until the CONVST pin is held high.
A CONVST falling edge brings the device out of NAP mode; however, the host controller can initiate a new conversion (CONVST rising edge) only after the tnap_wkup time has elapsed.
Figure 104 shows a typical conversion cycle with NAP mode enabled (NAP_EN = 1b).
The cycle time is given by Equation 17.
At lower throughputs, cycle time (tcycle) increases but the conversion time (tconv) remains constant, and therefore the device spends more time in NAP mode, thus giving power scaling with throughput as shown in Figure 105.
The device also features a deep power-down mode (PD) to reduce the power consumption at very low throughput rates.
To enter PD mode:
In PD mode, all analog blocks within the device are powered down. All register contents are retained and the interface remains active.
To exit PD mode: