Product details

Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 2000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 15 Analog voltage AVDD (Min) (V) 1.65 SNR (dB) 100 Analog voltage AVDD (Max) (V) 1.95 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 1.95
Resolution (Bits) 18 Number of input channels 1 Sample rate (Max) (kSPS) 2000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 15 Analog voltage AVDD (Min) (V) 1.65 SNR (dB) 100 Analog voltage AVDD (Max) (V) 1.95 INL (Max) (+/-LSB) 1.5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 1.95
VQFN (RGE) 24 16 mm² 4 x 4
  • Sample Rate: 2 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.5 LSB
    • DNL: ±0.75 LSB
    • SNR: 100 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2 MSPS (AVDD Only)
    • 15 mW at 2 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Sample Rate: 2 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.5 LSB
    • DNL: ±0.75 LSB
    • SNR: 100 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2 MSPS (AVDD Only)
    • 15 mW at 2 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS9110 is an 18-bit, 2-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9120 is a pin-compatible, 16-bit, 2.5-MSPS variant of the ADS9110.

The ADS9110 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9110 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9110 is compatible with a standard SPI Interface. The ADS9110 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

The ADS9110 is an 18-bit, 2-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9120 is a pin-compatible, 16-bit, 2.5-MSPS variant of the ADS9110.

The ADS9110 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9110 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9110 is compatible with a standard SPI Interface. The ADS9110 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

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Technical documentation

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Type Title Date
* Data sheet ADS9110 18-Bit, 2-MSPS, 15-mW, SAR ADC With Enhanced Performance Features datasheet (Rev. B) 29 Jun 2017
Application note Understanding and Using SAR ADC SPICE Micromodel 23 Nov 2021
Application note Maximizing System Total Harmonic Distortion Using High Speed Amplifiers 20 Jun 2018
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Application note Improving Input Settling for Precision Data Converters 12 Dec 2017
Application note Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dec 2017
Application note Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dec 2017
Application note Improving Resolution of SAR ADC 14 Jun 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016
White paper Voltage-reference impact on total harmonic distortion 01 Aug 2016
User guide ADS9110EVM-PDK User's Guide 07 Oct 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS9110EVM-PDK — ADS9110 performance demonstration kit for 18-bit, 2-MSPS, one-channel SAR ADC with enhanced SPI

The ADS9110 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS9110 successive-approximation register analog-to-digital converter (SAR ADC). The ADS9110EVM-PDK includes the ADS9110 EVM board, the PHI controller board, and accompanying (...)

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Support software

ADS9110EVM-PDK Software (Rev. A)

SBAC140A.ZIP (344998 KB)
Support software

Source Files for SBAA265 (Rev. A)

SBAC193A.ZIP (75 KB)
Simulation model

ADS9110 TINA-TI Transient Reference Design

SBAM253.TSC (285 KB) - TINA-TI Reference Design
Simulation model

ADS9110 TINA-TI Spice Model

SBAM254.ZIP (26 KB) - TINA-TI Spice Model
Simulation model

ADS9110 TINA-TI Transient Reference Simulation

SBAM255.TSC (297 KB) - TINA-TI Reference Design
Simulation model

ADS9110 PSpice Transient Model (Rev. A)

SBAM461A.ZIP (3273 KB) - PSpice Model
Simulation model

ADS9110 IBIS MODEL

SLAM274.ZIP (12 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Reference designs

TIDA-01055 — ADC Voltage Reference Buffer Optimization Reference Design for High Performance DAQ Systems

The TIDA-01055 reference design for high performance DAQ Systems optimizes the ADC reference buffer to improve SNR performance and reduce power consumption with the TI OPA837 high-speed op amp. This device is used in a composite buffer configuration and provides a 22% power improvement over (...)
Reference designs

TIDA-00732 — 18-bit, 2-Msps Isolated Data Acquisition Reference Design to Achieve Maximum SNR and Sampling Rate

This “18-bit, 2-Msps Isolated Data Acquisition Reference Design to achieve maximum SNR and sampling rate”  illustrates how to overcome performance-limiting challenges typical of isolated data acquisition system design:
  • Maximizing sampling rate by minimizing propagation delay introduced by digital (...)
Reference designs

TIPD115 — Data Acquisition Optimized for Lowest Distortion, Lowest Noise, 18 bit, 1Msps Reference Design

This TI Verified Design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest noise & distortion solution for a full scale input sinewave of 10 KHz. This leads to a maximum possible (...)
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