18.104.22.168 Board Designs
TI only supports board designs using DDR3 memory that follow the guidelines in this document. The switching characteristics and timing diagram for the DDR3 memory controller are shown in Table 8-3 and Figure 8-1.
Table 8-3 Switching Characteristics Over Recommended Operating Conditions for DDR3 Memory Controller
||Cycle time, DDR_CLK
- This is the absolute maximum the clock period can be. Actual maximum clock period may be limited by DDR3 speed grade and operating frequency (see the DDR3 memory device data sheet).
Figure 8-1 DDR3 Memory Controller Clock Timing