SLUSA75B July   2010  – January 2020 BQ24650

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Battery Voltage Regulation
      2. 8.3.2  Input Voltage Regulation
      3. 8.3.3  Battery Current Regulation
      4. 8.3.4  Battery Precharge
      5. 8.3.5  Charge Termination and Recharge
      6. 8.3.6  Power Up
      7. 8.3.7  Enable and Disable Charging
      8. 8.3.8  Automatic Internal Soft-Start Charger Current
      9. 8.3.9  Converter Operation
      10. 8.3.10 Synchronous and Non-Synchronous Operation
      11. 8.3.11 Cycle-by-Cycle Charge Undercurrent
      12. 8.3.12 Input Overvoltage Protection (ACOV)
      13. 8.3.13 Input Undervoltage Lockout (UVLO)
      14. 8.3.14 Battery Overvoltage Protection
      15. 8.3.15 Cycle-by-Cycle Charge Overcurrent Protection
      16. 8.3.16 Thermal Shutdown Protection
      17. 8.3.17 Temperature Qualification
      18. 8.3.18 Charge Enable
      19. 8.3.19 Inductor, Capacitor, and Sense Resistor Selection Guidelines
      20. 8.3.20 Charge Status Outputs
      21. 8.3.21 Battery Detection
        1. 8.3.21.1 Example
    4. 8.4 Device Functional Modes
      1. 8.4.1 Converter Operation
      2. 8.4.2 Synchronous and Non-Synchronous Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Power MOSFETs Selection
        5. 9.2.2.5 Input Filter Design
        6. 9.2.2.6 MPPT Temperature Compensation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power MOSFETs Selection

Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30 V or higher voltage rating MOSFETs are preferred for 20-V input voltage, and 40 V or higher rating MOSFETs are preferred for 20-V to 28-V input voltage.

Figure-of-merit (FOM) is usually used for selecting a proper MOSFET based on a tradeoff between conduction loss and switching loss. For a top-side MOSFET, FOM is defined as the product of the MOSFET's on-resistance, RDS(on), and the gate-to-drain charge, QGD. For a bottom-side MOSFET, FOM is defined as the product of the MOSFET's on-resistance, RDS(on), and the total gate charge, QG.

Equation 17. BQ24650 EQ16_FOM_lusa75.gif

The lower the FOM value, the lower the total power loss. Usually a lower RDS(on) has a higher cost with the same package size.

Top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D = VOUT/VIN), charging current (ICHG), the MOSFET's on-resistance RDS(on), input voltage (VIN), switching frequency (F), turnon time (ton) and turnoff time (toff):

Equation 18. BQ24650 EQ17_Ptop_lusa75.gif

The first item represents the conduction loss. Usually MOSFET RDS(ON) increases by 50% with 100°C junction temperature rise. The second term represents switching loss. The MOSFET turnon and turnoff times are given by:

Equation 19. BQ24650 EQ18_TON_OFF_lusa75.gif

where

  • QSW is the switching charge,
  • Ion is the turnon gate driving current,
  • and Ioff is the turnoff gate driving current.

If the switching charge is not given in the MOSFET datasheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):

Equation 20. BQ24650 EQ19_QSW_lusa75.gif

The gate driving current total can be estimated by the REGN voltage (VREGN), MOSFET plateau voltage (VPLT), total turnon gate resistance (Ron), and turnoff gate resistance (Roff) of the gate driver:

Equation 21. BQ24650 EQ20_ION_OFF_lusa75.gif

The conduction loss of the bottom-side MOSFET is calculated in Equation 22 when it operates in synchronous continuous conduction mode:

Equation 22. BQ24650 EQ21_PBOT_lusa75.gif

If the SRP-SRN voltage decreases below 5 mV (the charger is also forced into non-synchronous mode when the average SRP-SRN voltage is lower than 1.25 mV), the low-side FET is turned off for the remainder of the switching cycle to prevent negative inductor current.

As a result, all of the freewheeling current goes through the body diode of the bottom-side MOSFET. The maximum charging current in non-synchronous mode can be up to 0.9 A (0.5 A typical) for a 10-mΩ charging current sensing resistor, considering the IC tolerance. Choose a bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum non-synchronous mode charging current.

MOSFET gate driver power loss contributes to dominant losses on the controller IC, when the buck converter is switching. Choosing a MOSFET with a small Qg_total reduces power loss to avoid thermal shutdown.

Equation 23. BQ24650 EQ22_PD_lusa75.gif

where

  • Qg_total is the total gate charge for both the upper and lower MOSFETs at 6V VREGN.