SLUSD36 September 2017
PRODUCTION DATA.
The switching node rise and fall times should be minimized for minimum switching loss. Proper layout of the components to minimize high frequency current path loop (see Figure 29) is important to prevent electrical andmagnetic field radiation and high frequency resonant problems.
IMPORTANT
It is essential to follow this specific layout PCB order.
See the EVM design for the recommended component placement with trace and via locations.