SLUSD36 September   2017

PRODUCTION DATA.  

1. 1 Features
2. 2 Applications
3. 3 Description
4. 4 Revision History
5. 5 Description (continued)
6. 6 Pin Configuration and Functions
7. 7 Specifications
   1. 7.1 Absolute Maximum Ratings
   2. 7.2 ESD Ratings
   3. 7.3 Recommended Operating Conditions
   4. 7.4 Thermal information
   5. 7.5 Electrical Characteristics
   6. 7.6 Timing Requirements
   7. 7.7 Typical Characteristics
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1  Power-On-Reset (POR)
      2. 8.3.2  Device Power Up from Battery without Input Source
      3. 8.3.3  Power Up from Input Source
         1. 8.3.3.1 Power Up REGN Regulation
         2. 8.3.3.2 Poor Source Qualification
         3. 8.3.3.3 Input Source Type Detection
            1. 8.3.3.3.1 PSEL Pins Sets Input Current Limit in bq25600C
         4. 8.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
         5. 8.3.3.5 Converter Power-Up
      4. 8.3.4  Host Mode and Standalone Power Management
         1. 8.3.4.1 Host Mode and Default Mode in bq25600C
      5. 8.3.5  Power Path Management
      6. 8.3.6  Battery Charging Management
         1. 8.3.6.1 Autonomous Charging Cycle
         2. 8.3.6.2 Battery Charging Profile
         3. 8.3.6.3 Charging Termination
         4. 8.3.6.4 Charging Safety Timer
         5. 8.3.6.5 Narrow VDC Architecture
      7. 8.3.7  Shipping Mode
         1. 8.3.7.1 BATFET Disable Mode (Shipping Mode)
         2. 8.3.7.2 BATFET Enable (Exit Shipping Mode)
      8. 8.3.8  Status Outputs (PG, STAT)
         1. 8.3.8.1 Power Good indicator (PG Pin and PG_STAT Bit)
         2. 8.3.8.2 Charging Status indicator (STAT)
         3. 8.3.8.3 Interrupt to Host (INT)
      9. 8.3.9  Protections
         1. 8.3.9.1 Voltage and Current Monitoring in Converter Operation
            1. 8.3.9.1.1 Voltage and Current Monitoring in Buck Mode
               1. 8.3.9.1.1.1 Input Overvoltage (ACOV)
         2. 8.3.9.2 Thermal Regulation and Thermal Shutdown
            1. 8.3.9.2.1 Thermal Protection in Buck Mode
         3. 8.3.9.3 Battery Protection
            1. 8.3.9.3.1 Battery overvoltage Protection (BATOVP)
      10. 8.3.10 Serial interface
          1. 8.3.10.1 Data Validity
          2. 8.3.10.2 START and STOP Conditions
          3. 8.3.10.3 Byte Format
          4. 8.3.10.4 Acknowledge (ACK) and Not Acknowledge (NACK)
          5. 8.3.10.5 Slave Address and Data Direction Bit
          6. 8.3.10.6 Single Read and Write
          7. 8.3.10.7 Multi-Read and Multi-Write
   4. 8.4 Register Maps
      1. 8.4.1  REG00
      2. 8.4.2  REG01
      3. 8.4.3  REG02
      4. 8.4.4  REG03
      5. 8.4.5  REG04
      6. 8.4.6  REG05
      7. 8.4.7  REG06
      8. 8.4.8  REG07
      9. 8.4.9  REG08
      10. 8.4.10 REG09
      11. 8.4.11 REG0A
      12. 8.4.12 REG0B
9. 9 Application and Implementation
   1. 9.1 Application information
   2. 9.2 Typical Application Diagram
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
         1. 9.2.2.1 Inductor Selection
         2. 9.2.2.2 input Capacitor
         3. 9.2.2.3 Output Capacitor
   3. 9.3 Application Curves
10. 10Power Supply Recommendations
11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
13. 13Mechanical, Packaging, and Orderable Information