SLUSBF2C July   2013  – August 2015

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power-On Reset
    6. 7.6  2.5-V LDO Regulator
    7. 7.7  Charger Attachment and Removal Detection
    8. 7.8  Voltage Doubler
    9. 7.9  Overvoltage Protection (OVP)
    10. 7.10 Undervoltage Protection (UVP)
    11. 7.11 Overcurrent in Discharge (OCD)
    12. 7.12 Overcurrent in Charge (OCC)
    13. 7.13 Short-Circuit in Discharge (SCD)
    14. 7.14 Low-Voltage Charging
    15. 7.15 Internal Temperature Sensor Characteristics
    16. 7.16 Internal Clock Oscillators
    17. 7.17 Integrating ADC (Coulomb Counter) Characteristics
    18. 7.18 ADC (Temperature and Cell Voltage) Characteristics
    19. 7.19 Data Flash Memory Characteristics
    20. 7.20 I2C-Compatible Interface Timing Characteristics
    21. 7.21 HDQ Communication Timing Characteristics
    22. 7.22 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Configuration
      2. 8.3.2 Fuel Gauging
      3. 8.3.3 Wake-Up Comparator
      4. 8.3.4 Battery Parameter Measurements
        1. 8.3.4.1 Charge and Discharge Counting
        2. 8.3.4.2 Voltage
        3. 8.3.4.3 Current
        4. 8.3.4.4 Auto-Calibration
        5. 8.3.4.5 Temperature
      5. 8.3.5 Communications
        1. 8.3.5.1 HDQ Single-Pin Serial Interface
        2. 8.3.5.2 HDQ Host Interruption
          1. 8.3.5.2.1 Low Battery Capacity
          2. 8.3.5.2.2 Temperature
        3. 8.3.5.3 I2C Interface
          1. 8.3.5.3.1 I2C Time Out
          2. 8.3.5.3.2 I2C Command Waiting Time
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 SLEEP Mode
      3. 8.4.3 FULLSLEEP Mode
      4. 8.4.4 Battery Protector Description
        1. 8.4.4.1 High-Side N-Channel FET Charge and Discharge FET Drive
        2. 8.4.4.2 Operating Modes
          1. 8.4.4.2.1 VIRTUAL SHUTDOWN Mode
            1. 8.4.4.2.1.1 ANALOG SHUTDOWN Mode
            2. 8.4.4.2.1.2 LOW-VOLTAGE CHARGING Mode
          2. 8.4.4.2.2 UNDERVOLTAGE FAULT Mode
          3. 8.4.4.2.3 NORMAL Mode
          4. 8.4.4.2.4 SHUTDOWN WAIT Mode
          5. 8.4.4.2.5 OVERCURRENT IN DISCHARGE (OCD) and SHORT-CIRCUIT IN DISCHARGE (SCD) FAULT Mode
          6. 8.4.4.2.6 OVERCURRENT IN CHARGE (OCC) FAULT Mode
          7. 8.4.4.2.7 OVERVOLTAGE PROTECTION (OVP) FAULT Mode
        3. 8.4.4.3 Firmware Control of Protector
      5. 8.4.5 OVERTEMPERATURE FAULT Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Pack-Side, Single-Cell Li-Ion Fuel Gauge and Protector
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  BAT Voltage Sense Input
          2. 9.2.1.2.2  SRP and SRN Current Sense Inputs
          3. 9.2.1.2.3  Sense Resistor Selection
          4. 9.2.1.2.4  TS Temperature Sense Input
          5. 9.2.1.2.5  Thermistor Selection
          6. 9.2.1.2.6  VPWR Power Supply Input Filtering
          7. 9.2.1.2.7  REG25 LDO Output Filtering
          8. 9.2.1.2.8  Communication Interface Lines
          9. 9.2.1.2.9  PACKP Voltage Sense Input
          10. 9.2.1.2.10 CHG and DSG Charge Pump Voltage Outputs
          11. 9.2.1.2.11 N-Channel FET Selection
          12. 9.2.1.2.12 Additional ESD Protection Components
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Li-Ion Cell Connections
      2. 11.1.2 Sense Resistor Connections
      3. 11.1.3 Thermistor Connections
      4. 11.1.4 FET Connections
      5. 11.1.5 ESD Component Connections
      6. 11.1.6 High Current and Low Current Path Separation
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

10.1 Power Supply Decoupling

The VPWR input pin and the REG25 output pin require low equivalent series resistance (ESR) ceramic capacitors placed as closely as possible to the respective pins to optimize ripple rejection and to provide a stable and dependable power rail that is resilient to line transients. A 0.1-μF capacitor at the VPWR and a 1-μF capacitor at REG25 suffice for satisfactory device performance.