SLUSEE3 July   2021 BQ51013B-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Details of a Qi Wireless Power System and BQ51013B-Q1 Power Transfer Flow Diagrams
      2. 9.3.2  Dynamic Rectifier Control
      3. 9.3.3  Dynamic Efficiency Scaling
      4. 9.3.4  RILIM Calculations
      5. 9.3.5  Input Overvoltage
      6. 9.3.6  Adapter Enable Functionality and EN1/EN2 Control
      7. 9.3.7  End Power Transfer Packet (WPC Header 0x02)
      8. 9.3.8  Status Outputs
      9. 9.3.9  WPC Communication Scheme
      10. 9.3.10 Communication Modulator
      11. 9.3.11 Adaptive Communication Limit
      12. 9.3.12 Synchronous Rectification
      13. 9.3.13 Temperature Sense Resistor Network (TS)
      14. 9.3.14 3-State Driver Recommendations for the TS/CTRL Pin
      15. 9.3.15 Thermal Protection
      16. 9.3.16 WPC v1.2 Compliance – Foreign Object Detection
      17. 9.3.17 Receiver Coil Load-Line Analysis
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 BQ51013B-Q1 Wireless Power Receiver Used as a Power Supply
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Using The BQ51013B-Q1 as a Wireless Power Supply: (See Figure 1-1 )
          2. 10.2.1.2.2 Series and Parallel Resonant Capacitor Selection
          3. 10.2.1.2.3 Recommended RX Coils
          4. 10.2.1.2.4 COMM, CLAMP, and BOOT Capacitors
          5. 10.2.1.2.5 Control Pins and CHG
          6. 10.2.1.2.6 Current Limit and FOD
          7. 10.2.1.2.7 RECT and OUT Capacitance
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Dual Power Path: Wireless Power and DC Input
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
      3. 10.2.3 Wireless and Direct Charging of a Li-Ion Battery at 800 mA
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Adapter Enable Functionality and EN1/EN2 Control

Figure 10-6 is an example application that shows the BQ51013B-Q1 used as a wireless power receiver that can power mutliplex between wired or wireless power for the down-system electronics. In the default operating mode, pins EN1 and EN2 are low, which activates the adapter enable functionality. In this mode, if an adapter is not present the AD pin will be low, and AD-EN pin will be pulled to the higher of the OUT and AD pins so that the PMOS between OUT and AD will be turned off. If an adapter is plugged in and the voltage at the AD pin goes above V AD-EN , then wireless charging is disabled and the AD-EN pin will be pulled approximately VAD below the AD pin to connect AD to the secondary charger. The difference between AD and AD-EN is regulated to a maximum of VAD-Diff to ensure the VGS of the external PMOS is protected.

The EN1 and EN2 pins include internal pulldown resistors (RPD), so that if these pins are not connected BQ51013B-Q1 defaults to AD-EN control mode. However, these pins can be pulled high to enable other operating modes. If the pins are pulled high or controlled by drivers and are subject to fast transient (>10V/10ns) higher than ~ 8V it is recommended that current limit resistors (1k to 10k ohms) be added in series with the pins. See Table 9-2:

Table 9-2 Adapter Enable Functionality
EN1EN2RESULT
00Adapter control enabled. If adapter is present then secondary charger is powered by adapter, otherwise wireless charging is enabled when wireless power is available. Communication current limit is enabled.
01Disables communication current limit.
10AD-EN is pulled low, whether or not adapter voltage is present. This feature can be used for USB OTG applications.
11Adapter and wireless charging are disabled, power will not be delivered by the OUT pin in this mode.
Table 9-3 EN1/EN2 Control
EN1EN2WIRELESS POWERWIRED POWEROTG MODEADAPTIVE COMMUNICATION LIMITEPT
00EnabledPriority(1)DisabledEnabledNot Sent to TX
01Priority(1)EnabledDisabledDisabledNot Sent to TX
10DisabledEnabledEnabled(2)N/AEPT 0x00, Unknown
11DisabledDisabledDisabledN/AEPT 0x01,
Charge Complete
If both wired and wireless power are present, wired or wireless is given priority based on EN2.
Allows for a boost-back supply to be driven from the output terminal of the RX to the adapter port through the external back-to-back PMOS FET.

As described in Table 9-3, when EN1 is low, both wired and wireless power are useable. If both are present, priority is set between wired and wireless by EN2. When EN1 is high, wireless power is disabled and wired power functionality is set by EN2. When EN1 is high but EN2 is low, wired power is enabled if present. Additionally, USB OTG mode is active. In USB OTG mode, a charger connected to the OUT pin can power the AD pin. Note that EN1 must be pulled high from an active source (microcontroller). Finally, pulling both EN1 and EN2 high disables both wired and wireless charging.

Note:

It is required to connect a back-to-back PMOS between AD and OUT so that voltage is blocked in both directions. Also, when AD mode is enabled no load can be pulled from the RECT pin as this could cause an internal device overvoltage in BQ51013B-Q1.