SWRS227B March   2020  – May 2021 CC3130

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Functional Block Diagram
  5. Revision History
  6. Device Comparison
    1. 6.1 Related Products
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagram
    2. 7.2 Pin Attributes
    3. 7.3 Signal Descriptions
      1.      12
    4. 7.4 Connections for Unused Pins
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Power-On Hours (POH)
    4. 8.4  Recommended Operating Conditions
    5. 8.5  Current Consumption Summary
    6. 8.6  TX Power Control
    7. 8.7  Brownout and Blackout Conditions
      1. 8.7.1 Brownout and Blackout Voltage Levels
    8. 8.8  Electrical Characteristics for DIO Pins
      1. 8.8.1 Electrical Characteristics: DIO Pins Except 52 and 53
      2. 8.8.2 Electrical Characteristics: DIO Pins 52 and 53
    9. 8.9  Electrical Characteristics for Pin Internal Pullup and Pulldown
    10. 8.10 WLAN Receiver Characteristics
      1.      28
    11. 8.11 WLAN Transmitter Characteristics
      1.      30
    12. 8.12 WLAN Transmitter Out-of-Band Emissions
      1. 8.12.1 WLAN 2.4 GHz Filter Requirements
    13. 8.13 BLE/2.4 GHz Radio Coexistence and WLAN Coexistence Requirements
    14. 8.14 Thermal Resistance Characteristics for RGK Package
    15. 8.15 Timing and Switching Characteristics
      1. 8.15.1 Power Supply Sequencing
      2. 8.15.2 Device Reset
      3. 8.15.3 Reset Timing
        1. 8.15.3.1 nRESET (32-kHz Crystal)
        2. 8.15.3.2 First-Time Power-Up and Reset Removal Timing Requirements (32-kHz Crystal)
        3. 8.15.3.3 nRESET (External 32-kHz Crystal)
          1. 8.15.3.3.1 First-Time Power-Up and Reset Removal Timing Requirements (External 32-kHz Crystal)
      4. 8.15.4 Wakeup From HIBERNATE Mode
        1. 8.15.4.1 nHIB Timing Requirements
      5. 8.15.5 Clock Specifications
        1. 8.15.5.1 Slow Clock Using Internal Oscillator
          1. 8.15.5.1.1 RTC Crystal Requirements
        2. 8.15.5.2 Slow Clock Using an External Clock
          1. 8.15.5.2.1 External RTC Digital Clock Requirements
        3. 8.15.5.3 Fast Clock (Fref) Using an External Crystal
          1. 8.15.5.3.1 WLAN Fast-Clock Crystal Requirements
        4. 8.15.5.4 Fast Clock (Fref) Using an External Oscillator
          1. 8.15.5.4.1 External Fref Clock Requirements (–40°C to +85°C)
      6. 8.15.6 Interfaces
        1. 8.15.6.1 Host SPI Interface Timing
          1. 8.15.6.1.1 Host SPI Interface Timing Parameters
        2. 8.15.6.2 Flash SPI Interface Timing
          1. 8.15.6.2.1 Flash SPI Interface Timing Parameters
        3. 8.15.6.3 DIO Interface Timing
          1. 8.15.6.3.1 DIO Output Transition Time Parameters (Vsupply = 3.3 V)
            1. 8.15.6.3.1.1 DIO Output Transition Times (Vsupply = 3.3 V) (1)
          2. 8.15.6.3.2 DIO Input Transition Time Parameters
            1. 8.15.6.3.2.1 DIO Input Transition Time Parameters
    16. 8.16 External Interfaces
      1. 8.16.1 SPI Flash Interface
      2. 8.16.2 SPI Host Interface
      3. 8.16.3 Host UART Interface
        1. 8.16.3.1 5-Wire UART Topology
        2. 8.16.3.2 4-Wire UART Topology
        3. 8.16.3.3 3-Wire UART Topology
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Device Features
      1. 9.2.1 WLAN
      2. 9.2.2 Network Stack
      3. 9.2.3 Security
      4. 9.2.4 Host Interface and Driver
      5. 9.2.5 System
    3. 9.3 Power-Management Subsystem
      1. 9.3.1 VBAT Wide-Voltage Connection
    4. 9.4 Low-Power Operating Modes
      1. 9.4.1 Low-Power Deep Sleep
      2. 9.4.2 Hibernate
      3. 9.4.3 Shutdown
    5. 9.5 Memory
      1. 9.5.1 External Memory Requirements
    6. 9.6 Restoring Factory Default Configuration
    7. 9.7 Hostless Mode
  10. 10Applications, Implementation, and Layout
    1. 10.1 Application Information
      1. 10.1.1 BLE/2.4 GHz Radio Coexistence
      2. 10.1.2 Antenna Selection
      3. 10.1.3 Typical Application
    2. 10.2 PCB Layout Guidelines
      1. 10.2.1 General PCB Guidelines
      2. 10.2.2 Power Layout and Routing
        1. 10.2.2.1 Design Considerations
      3. 10.2.3 Clock Interface Guidelines
      4. 10.2.4 Digital Input and Output Guidelines
      5. 10.2.5 RF Interface Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Tools and Software
    2. 11.2 Firmware Updates
    3. 11.3 Device Nomenclature
    4. 11.4 Documentation Support
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Application

Figure 10-5 shows the schematic of the engine area for the CC3130 device in the wide-voltage mode of operation, and the optional RF implementations with BLE/2.4GHz coexistence. The corresponding Bill-of-Materials show in Table 10-1. For a full operation reference design, see the CC3235x SimpleLink™ and Internet of Things Hardware Design Files.

Note:

The Following guidelines are recommended for implementation of the RF design:

  • Ensure an RF path is designed with an impedance of 50 Ω
  • Tuning of the antenna impedance π matching network is recommended after manufacturing of the PCB to account for PCB parasitics
  • π or L matching and tuning may be required between cascaded passive components on the RF path
GUID-A49CDC33-1B33-448F-A980-861D4DD6939C-low.gifFigure 10-5 CC3130 Engine Area and Optional BLE Coexistence
Table 10-1 Bill-of-Materials for CC3130 Engine Area and Optional Coexistence
QUANTITYDESIGNATORVALUEMANUFACTURERPART NUMBERDESCRIPTION
1C11 µFMuRataGRM155R61A105KE15DCapacitor, Ceramic, 1 µF,
10 V, ±10%, X5R, 0402
2C2, C3100 µFTaiyo YudenLMK325ABJ107MMHTCapacitor, Ceramic, 100 µF,
10 V, ±20%, X5R, 1210
3C4, C5, C64.7 µFTDKC1005X5R0J475M050BCCapacitor, Ceramic, 4.7 µF,
6.3 V, ±20%, X5R, 0402
10C7, C8, C9, C11, C12, C13, C18, C19, C21, C220.1 µFTDKC1005X5R1A104K050BACapacitor, Ceramic, 0.1 µF,
10 V, ±10%, X5R, 0402
3C10, C17, C2010 µFMuRataGRM188R60J106ME47DCapacitor, Ceramic, 10 µF,
6.3 V, ±20%, X5R, 0603
2C14, C1522 µFTDKC1608X5R0G226M080AACapacitor, Ceramic, 22 µF,
4 V, ±20%, X5R, 0603
1C161 µFTDKC1005X5R1A105K050BBCapacitor, Ceramic, 1 µF,
10 V, ±10%, X5R, 0402
2C23, C2410 pFMuRataGRM1555C1H100JA01DCapacitor, Ceramic, 10 pF,
50 V, ±5%, C0G/NP0, 0402
2C25, C266.2 pFMuRataGRM1555C1H6R2CA01DCapacitor, Ceramic, 6.2 pF,
50 V, ±5%, C0G/NP0, 0402
1C270.5 pFMuRataGRM1555C1HR50BA01DCapacitor, Ceramic, 0.5 pF,
50 V, ±20%, C0G/NP0, 0402
3C28(1), C29(1), C30(1)68 pFMuRataGRM0335C1H680JA1DCAP, CERM, 68 pF, 50 V,
+/- 5%, C0G/NP0, 0201
2C31(1), C32(1)100 pFYageoCC0201JRNPO8BN101CAP, CERM, 100 pF, 25 V,
+/- 5%, C0G/NP0, 0201
1E12.45-GHz AntennaTaiyo YudenAH316M245001-TANT Bluetooth W-LAN
Zigbee®, SMD
1FL11.02 dBTDKDEA202450BT-1294C1-HMultilayer Chip Band Pass Filter
For 2.4 GHz W-LAN/Bluetooth, SMD
1L13.3 nHMuRataLQG15HS3N3S02DInductor, Multilayer, Air Core,
3.3 nH, 0.3 A, 0.17 ohm, SMD
2L2, L42.2 µHMuRataLQM2HPN2R2MG0LInductor, Multilayer, Ferrite,
2.2 µH, 1.3 A, 0.08 ohm, SMD
1L31 µHMuRataLQM2HPN1R0MG0LInductor, Multilayer, Ferrite,
1 µH, 1.6 A, 0.055 ohm, SMD
1R1, R810 kVishay-DaleCRCW040210K0JNEDResistor, 10 k, 5%, 0.063 W, 0402
13R2, R3, R4, R5, R9(1), R10(1), R11, R12, R13, R14, R15, R16, R17100 kVishay-DaleCRCW0402100KJNEDResistor, 100 k, 5%, 0.063 W, 0402
1R62.7 kVishay-DaleCRCW04022K70JNEDResistor, 2.7 k, 5%, 0.063 W, 0402
1R7270Vishay-DaleCRCW0402270RJNEDResistor, 270, 5%, 0.063 W, 0402
1U1MX25RMacronix International Co., LTDMX25R3235FM1IL0Ultra-Low Power, 32-Mbit [x 1/x 2/x 4]
CMOS MXSMIO (Serial Multi I/O)
Flash Memory, SOP-8
1U2CC3130Texas InstrumentsCC3130RNMRGKRSimpleLink™ Wi-Fi® Wireless
Ntework Processor, RGK0064B
1U3(1)SPDT SwitchRichwaveRTC6608OSP0.03 GHz-6 GHz SPDT Switch
1Y1CrystalAbracon CorportationABS07-32.768KHZ-9-TCrystal, 32.768 KHz, 9PF, SMD
1Y2CrystalEpsonQ24FA20H0039600Crystal, 40 MHz, 8pF, SMD
If the BLE/2.4 GHz Coexistence features is not used, these components are not required.