SCHS032D November   1998  – July 2021 CD4027B

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Static Electrical Characteristics
    4. 6.4 Dynamic Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes (1)
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • NS|16
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Dynamic Electrical Characteristics

at TA = 25°C; Input tr, tf = 20 ns, CL = 50 pF, RL = 200 kΩ
CHARACTERISTIC VDD

(V)

 LIMITS UNIT
ALL PACKAGES
MIN TYP MAX
Propagation Delay Time 5 150 300 ns
Clock to Q or Q Outputs 10 65 130
tPHL, tPLH 15 45 90
Set to Q or Reset to Q, tPLH 5 150 300 ns
10 65 130
15 45 90
Set to Q or Reset to Q, tPHL 5 200 400 ns
10 85 170
15 60 120
Transition Time

tTHL, tTLH

 5 100 200 ns
10 50 100
15 40 80
Maximum Clock Input 5 3.5 7 MHz
Frequency (Toggle Mode)(1) 10 8 16
fCL 15 12 24
Minimum Clock Pulse Width, tW 5 70 140
10 30 60
15 20 40
Minimum Set or Reset Pulse Width, tW 5 90 180 ns
10 40 80
15 25 50
Minimum Data Setup Time, tS 5 100 200 ns
10 35 75
15 25 50
Clock Input Rise or Fall Time

trCL, tfCL

 5 45 μs
10 5
15 2
Input Capacitance, CI 5 7.5 pF
(1) Input tr, tf = 5 ns