SCAS945A
June 2015 – September 2015
CDCEL824
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
CLK_IN Timing Requirements
7.7
SDA/SCL Timing Requirements
7.8
EEPROM Specification
7.9
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Control Pins Settings
9.3.2
SDA/SCL Serial Interface
9.3.3
SDA/SCL Hardware Interface
9.4
Device Functional Modes
9.4.1
Default Device Setting
9.5
Programming
9.5.1
Data Protocol
9.5.2
Command Code Definition
9.5.3
Generic Programming Sequence
9.5.4
Byte Write Programming Sequence
9.5.5
Byte Read Programming Sequence
9.5.6
Block Write Programming Sequence
9.5.7
Block Read Programming Sequence
9.6
Register Maps
9.6.1
SDA/SCL Configuration Registers
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
PLL Multiplier/Divider Definition
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.2
Community Resources
13.3
Trademarks
13.4
Electrostatic Discharge Caution
13.5
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scas945a_oa
scas945a_pm
8 Parameter Measurement Information
Figure 3. Test Load
Figure 4. Test Load for 50-Ω Board Environment