SLPS446D April   2014  – December 2016 CSD95379Q3M

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 Functional Description
        1. 7.2.1.1 Powering CSD95379Q3M and Gate Drivers
      2. 7.2.2 Undervoltage Lockout (UVLO) Protection
      3. 7.2.3 PWM Pin
      4. 7.2.4 SKIP# Pin
      5. 7.2.5 Zero Crossing (ZX) Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Power Loss Curves
      2. 8.1.2 Safe Operating Area (SOA) Curves
      3. 8.1.3 Normalized Curves
      4. 8.1.4 Calculating Power Loss and SOA
        1. 8.1.4.1 Design Example
        2. 8.1.4.2 Calculating Power Loss
        3. 8.1.4.3 Calculating SOA Adjustments
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Electrical Performance
      2. 9.1.2 Thermal Performance
    2. 9.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Community Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Drawing
    2. 11.2 Recommended PCB Land Pattern
    3. 11.3 Recommended Stencil Opening

Package Options

Mechanical Data (Package|Pins)
  • DNS|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 92.5% System Efficiency at 12 A
  • Ultra-Low Power Loss of 1.8 W at 12 A
  • Max Rated Continuous Current of 20 A and Peak Current of 45 A
  • High-Frequency Operation (up to 2 MHz)
  • High-Density SON 3.3-mm × 3.3-mm Footprint
  • Ultra-Low Inductance Package
  • System Optimized PCB Footprint
  • Low Quiescent (LQ) and Ultra-Low Quiescent (ULQ) Current Mode
  • 3.3-V and 5-V PWM Signal Compatible
  • Diode Emulation Mode with FCCM
  • Tri-State PWM Input
  • Integrated Bootstrap Diode
  • Shoot-Through Protection
  • RoHS Compliant – Lead-Free Terminal Plating
  • Halogen Free

2 Applications

  • NVDC Notebook and Ultrabook PCs
  • Tablets
  • Point of Load Synchronous Buck in Networking, Telecom, and Computing Systems

3 Description

The CSD95379Q3M NexFET™ power stage is a highly optimized design for use in high-power, high-density synchronous buck converters. This product integrates the driver IC and NexFET technology to complete the power stage switching function. The driver IC has a built-in selectable diode emulation function that enables DCM operation to improve light load efficiency. In addition, the driver IC supports ULQ mode that enables Connected Standby for Windows® 8. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP# is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). This combination produces high-current, high-efficiency, and high-speed switching capability in a small 3.3-mm × 3.3-mm outline package. In addition, the PCB footprint has been optimized to help reduce design time and simplify the completion of the overall system design.

Device Information(1)

DEVICE MEDIA QTY PACKAGE SHIP
CSD95379Q3M 13-Inch Reel 2500 SON
3.3-mm × 3.3-mm
Plastic Package		 Tape and Reel
CSD95379Q3MT 7-Inch Reel 250
(1) For all available packages, see the orderable addendum at the end of the data sheet.

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Application Diagram

CSD95379Q3M Front_Page_Circuit.gif

Typical Power Stage Efficiency and Power Loss

CSD95379Q3M front_page_SLPS446.gif