The DACx1001 family of DACs works with a 4-wire SPI interface. The digital interface of the DACx1001 to a processor is shown in Figure 67. The DACx1001 has an LDAC input option for synchronous output update. In ac-signal generation applications, the jitter in the LDAC signal contributes to signal-to-noise ratio (SNR). Therefore, the LDAC signal must be generated from a low-jitter timer in the processor. The CLR and ALARM pins are static signals, and therefore can be connected to general-purpose input-output (GPIO) pins on the processor. All active-low signals (SYNC, LDAC, CLR, and ALARM) must be pulled up to IOVDD using 10-kΩ resistors. ALARM is an output pin from the DAC, so the corresponding GPIO on the processor must be configured as an input. Either poll the GPIO, or configured the GPIO as an interrupt to detect any failure alarm from the DAC. When using a high SCLK frequency, use source termination resistors, as shown in Interfacing to a Processor. Typically, 33-Ω resistors work on printed circuit boards (PCBs) with a 50-Ω trace impedance.