SBAS334D November   2004  – July 2016 DAC5675A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description Continued
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Electrical Characteristics
    6. 7.6 AC Electrical Characteristics
    7. 7.7 Digital Specifications
    8. 7.8 Operational Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital Inputs
      2. 8.3.2 Clock Input
      3. 8.3.3 Supply Inputs
      4. 8.3.4 DAC Transfer Function
      5. 8.3.5 Reference Operation
      6. 8.3.6 Analog Current Outputs
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
    6. 12.6 Device Nomenclature
      1. 12.6.1 Definitions of Specifications and Terminology
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

The DAC5675 EVM layout should be used as a reference for the layout to obtain the best performance. A sample layout is shown in Figure 27. Some important layout recommendations are:

  • Use a single ground plane. Keep the digital and analog signals on distinct separate sections of the board. This may be virtually divided down the middle of the device package when doing placement and layout.
  • Keep the analog outputs as far away from the switching clocks and digital signals as possible. This will keep coupling from the digital circuits to the analog outputs to a minimum.
  • Decoupling caps should be kept close to the power pins of the device.

11.2 Layout Example

DAC5675A layout_top_LGS387.png Figure 27. Top Layer of DAC5675A EVM Layout
DAC5675A layout_bot_LGS387.png Figure 28. Bottom Layer of DAC5675A EVM Layout