SLLSEC6E September 2012 – June 2019 DP83848-EP
PRODUCTION DATA.
This register provides a single location within the register set for quick access to commonly accessed information.
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15 | RESERVED | 0, RO | RESERVED: Write ignored, read as 0 |
14 | MDI-X Mode | 0, RO | MDI-X mode as reported by the Auto-Negotiation logic: |
This bit will be affected by the settings of the MDIX_EN and FORCE_MDIX bits in the PHYCR register. When MDIX is enabled, but not forced, this bit will update dynamically as the Auto-MDIX algorithm swaps between MDI and MDI-X configurations. | |||
1 = MDI pairs swapped | |||
(Receive on TPTD pair, Transmit on TPRD pair) | |||
0 = MDI pairs normal | |||
(Receive on TRD pair, Transmit on TPTD pair) | |||
13 | Receive Error Latch | 0, RO/LH | Receive Error Latch: |
This bit will be cleared upon a read of the RECR register. | |||
1 = Receive error event has occurred since last read of RXERCNT (address 0x15, Page 0) | |||
0 = No receive error event has occurred | |||
12 | Polarity Status | 0, RO | Polarity Status: |
This bit is a duplication of bit 4 in the 10BTSCR register. This bit will be cleared upon a read of the 10BTSCR register, but not upon a read of the PHYSTS register. | |||
1 = Inverted Polarity detected | |||
0 = Correct Polarity detected | |||
11 | False Carrier Sense Latch | 0, RO/LH | False Carrier Sense Latch: |
This bit will be cleared upon a read of the FCSR register. | |||
1 = False Carrier event has occurred since last read of FCSCR (address 0x14) | |||
0 = No False Carrier event has occurred | |||
10 | Signal Detect | 0, RO/LL | 100Base-TX unconditional Signal Detect from PMD |
9 | Descrambler Lock | 0, RO/LL | 100Base-TX Descrambler Lock from PMD |
8 | Page Received | 0, RO | Link Code Word Page Received: |
This is a duplicate of the Page Received bit in the ANER register, but this bit will not be cleared upon a read of the PHYSTS register. | |||
1 = A new Link Code Word Page has been received. Cleared on read of the ANER (address 0x06, bit 1) | |||
0 = Link Code Word Page has not been received | |||
7 | MII Interrupt | 0, RO | MII Interrupt Pending: |
1 = Indicates that an internal interrupt is pending. Interrupt source can be determined by reading the MISR Register (0x12h). Reading the MISR will clear the Interrupt. | |||
0= No interrupt pending | |||
6 | Remote Fault | 0, RO | Remote Fault: |
1 = Remote Fault condition detected (cleared on read of BMSR (address 01h) register or by reset). Fault criteria: notification from Link Partner of Remote Fault via Auto-Negotiation. | |||
0 = No remote fault condition detected | |||
5 | Jabber Detect | 0, RO | Jabber Detect: This bit only has meaning in 10 Mbps mode |
This bit is a duplicate of the Jabber Detect bit in the BMSR register, except that it is not cleared upon a read of the PHYSTS register. | |||
1 = Jabber condition detected | |||
0 = No Jabber | |||
4 | Auto-Neg Complete | 0, RO | Auto-Negotiation Complete: |
1 = Auto-Negotiation complete | |||
0 = Auto-Negotiation not complete | |||
3 | Loopback Status | 0, RO | Loopback: |
1 = Loopback enabled | |||
0 = Normal operation | |||
2 | Duplex Status | 0, RO | Duplex: |
This bit indicates duplex status and is determined from Auto-Negotiation or Forced Modes. | |||
1 = Full duplex mode | |||
0 = Half duplex mode | |||
Note: This bit is only valid if Auto-Negotiation is enabled and complete and there is a valid link or if Auto-Negotiation is disabled and there is a valid link. | |||
1 | Speed Status | 0, RO | Speed10: |
This bit indicates the status of the speed and is determined from Auto-Negotiation or Forced Modes. | |||
1 = 10 Mbps mode | |||
0 = 100 Mbps mode | |||
Note: This bit is only valid if Auto-Negotiation is enabled and complete and there is a valid link or if Auto-Negotiation is disabled and there is a valid link. | |||
0 | Link Status | 0, RO | Link Status: |
This bit is a duplicate of the Link Status bit in the BMSR register, except that it will not be cleared upon a read of the PHYSTS register. | |||
1 = Valid link established (for either 10 or 100 Mbps operation) | |||
0 = Link not established |