SLVSJF0A
October 2025 – July 2026
DRV7167
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information_DRV7167A
5.5
Electrical Characteristics
6
Typical Characteristics
7
Parameter Measurement Information
7.1
Propagation Delay and Mismatch Measurement
7.2
Slew Rate Measurement
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Control Inputs
8.3.1.1
EN/FLT Control
8.3.2
Dead Time Setting in Single PWM Mode
8.3.3
Start-up and UVLO
8.3.4
Synchronous Bootstrap
8.3.5
Level Shift
8.3.6
Zero Voltage Detection (ZVD) Reporting
8.3.7
Slew Rate Control
8.3.8
Fault Indication
8.3.9
Overcurrent Protection (OCP)
8.3.10
Over Temperature Detection (OTD)
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Bootstrap Capacitor
9.2.2.2
GVDD Bypass Capacitor
9.2.2.3
Power Dissipation
9.2.3
Application Curves
9.2.3.1
Slew rate plots
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Examples
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
12.1
Package Information
12.1.1
Mechanical Data
Package Options
Mechanical Data (Package|Pins)
VBN|18
MPQF801A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsjf0a_oa
Data Sheet
DRV7167A
100-V
,
60A
Half-Bridge GaN Motor Driver Power Stage