SLVSGJ9A May   2024  – October 2025 DRV7308

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Absolute Maximum Ratings
  7. 6 ESD Ratings
  8. 7 Recommended Operating Conditions
  9. 8 Thermal Information
  10. 9 Electrical Characteristics
  11. 10Timing Diagrams
  12. 11Typical Characteristics
  13. 12Detailed Description
    1. 12.1 Overview
    2. 12.2 Functional Block Diagram
    3. 12.3 Feature Description
      1. 12.3.1 Output Stage
      2. 12.3.2 Input Control Logic
      3. 12.3.3 ENABLE (EN) Pin Function
      4. 12.3.4 Temperature Sensor Output (VTEMP)
      5. 12.3.5 Brake Function
      6. 12.3.6 Slew Rate Control (SR)
      7. 12.3.7 Dead Time
      8. 12.3.8 Current Limit Functionality (ILIMIT)
      9. 12.3.9 Pin Diagrams
        1. 12.3.9.1 Four-Level Input Pin
        2. 12.3.9.2 Open-Drain Pin
        3. 12.3.9.3 Logic-Level Input Pin (Internal Pulldown)
    4. 12.4 Protections
      1. 12.4.1 GVDD Undervoltage Lockout
      2. 12.4.2 Bootstrap Undervoltage Lockout
      3. 12.4.3 Current Limit Protection
      4. 12.4.4 GaNFET Overcurrent Protection
      5. 12.4.5 Thermal Shutdown (OTS)
  14. 13Application and Implementation
    1. 13.1 Application Information
    2. 13.2 Typical Application
      1. 13.2.1 Application
        1. 13.2.1.1 Application Information
      2. 13.2.2 Application Curves
  15. 14Layout
    1. 14.1 Layout Guidelines
    2. 14.2 Layout Example
  16. 15Revision History
  17. 16Device and Documentation Support
    1. 16.1 Documentation Support
      1. 16.1.1 Related Documentation
    2. 16.2 Receiving Notification of Documentation Updates
    3. 16.3 Support Resources
    4. 16.4 Trademarks
    5. 16.5 Electrostatic Discharge Caution
    6. 16.6 Glossary
  18. 17Mechanical, Packaging, and Orderable Information
    1. 17.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Three-phase PWM motor driver with integrated 650V enhancement mode GaN FETs
  • Up to 450V operating voltage
    • 650V absolute maximum voltage
  • High output current capability: 5A Peak current
  • Low conduction loss: Low on-state resistance per GaN FET: 205mΩ RDS(ON) at TA = 25°C
  • Low switching loss: Zero reverse recovery, low output capacitance, slew rate control
  • Low distortion: Ultra-low propagation delay < 135ns, Ultra-low adaptive dead time < 200ns
  • Integrated gate drives with slew rate control of phase node voltage
    • Slew rate options from 5V/ns to 40V/ns
  • Integrated fast bootstrap GaN rectifier
  • Low-side GaN FET open source pins to support 1- or 2- or 3-shunt current sensing
  • Supports up to 100kHz hard switching
  • Integrates an amplifier for current sensing
  • Supports 3.3V and 5V logic inputs, up to 20V
  • BRAKE pin to turn on all low side GaN FETs
  • Integrated temperature sensor
  • >1.6mm clearance of motor phase (OUTx) to the adjacent pins.
  • 2mm clearance between VM and GND
  • Integrated protection features
    • GVDD and bootstrap under voltage lockout
    • Over current protection for low-side GaN FET
    • Over temperature protection
    • PWM adaptive dead time insertion
    • Current limit protection for all three phases
    • Fault condition indication pin (nFAULT)