SLOS709C June   2011  – December 2022 DRV8662

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fast Start-up (Enable Pin)
      2. 7.3.2 Gain Control
      3. 7.3.3 Adjustable Boost Voltage
      4. 7.3.4 Adjustable Boost Current Limit
      5. 7.3.5 Internal Charge Pump
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Startup/shutdown Sequencing
        1. 7.4.1.1 PWM Source
        2. 7.4.1.2 DAC Source
      2. 7.4.2 Low-voltage Operation
    5. 7.5 Programming
      1. 7.5.1 Programming the Boost Voltage
      2. 7.5.2 Programing the Boost Current Limit
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DRV8662 System Diagram with DAC Input
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Piezo Actuator Selection
          3. 8.2.1.2.3 Boost Capacitor Selection
          4. 8.2.1.2.4 Current Consumption Calculation
          5. 8.2.1.2.5 Input Filter Considerations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DRV8662 System Diagram with Filtered Single-Ended PWM Input
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Input Filter Design
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TA = 25°C, VO,PP = VOUT+ – VOUT– = 200 V, CL = 47 nF, AV = 40 dB, L = 4.7 µH (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
|IIL|Digital input low currentEN, GAIN0, GAIN1VDD = 3.6 V, VIN = 0 V1µA
|IIH|Digital input high currentEN, GAIN0, GAIN1VDD = 3.6 V, VIN = VDD5µA
ISDShut down currentVDD = 3.6 V, VEN = 0 V13µA
IDDQQuiescent currentVDD = 3.6 V, VEN = VDD, VBST = 105 V, no signal24mA
VDD = 3.6 V, VEN = VDD, VBST = 80 V, no signal13mA
VDD = 3.6 V, VEN = VDD, VBST = 55 V, no signal9mA
VDD = 3.6 V, VEN = VDD, VBST = 30 V, no signal5mA
RINInput impedanceAll gains100kΩ
AVAmplifier gainGAIN<1:0> = 0028.8dB
GAIN<1:0> = 0134.8
GAIN<1:0> = 1038.4
GAIN<1:0> = 1140.7
BWAmplifier BandwidthGAIN<1:0> = 00, VO,PP = 50 V, No Load20kHz
GAIN<1:0> = 01, VO,PP = 100 V, No Load10
GAIN<1:0> = 10, VO,PP = 150 V, No Load7.5
GAIN<1:0> = 11, VO,PP = 200 V, No Load5
IBAT, AVGAverage battery current during operationVDD = 3.6 V, CL = 10 nF, f = 150 Hz, VO,PP = 200 V75mA
VDD = 3.6 V, CL = 10 nF, f = 300 Hz, VO,PP = 200 V115
VDD = 3.6 V, CL = 47 nF, f = 150 Hz, VO,PP = 200 V210
VDD = 3.6 V, CL = 47 nF, f = 300 Hz, VO,PP = 200 V400
THD+NTotal harmonic distortion plus noisef = 300 Hz, VO,PP = 200 V1%