SLVSDS7B August 2019 – November 2019 DRV8876
The DRV887x family of devices support a low power mode to reduce current consumption from the VM pin when the driver is not active. This mode is entered by setting the nSLEEP pin logic low and waiting for tSLEEP to elapse. In sleep mode, the H-bridge, charge pump, internal 5-V regulator, and internal logic are disabled. The device relies on a weak pulldown to ensure all of the internal MOSFETs remain disabled. The device will not respond to any inputs besides nSLEEP while in low-power sleep mode.