SLVSDS7B August   2019  – November 2019 DRV8876


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 External Components
      2. 7.3.2 Control Modes
        1. PH/EN Control Mode (PMODE = Logic Low)
        2. PWM Control Mode (PMODE = Logic High)
        3. Independent Half-Bridge Control Mode (PMODE = Hi-Z)
      3. 7.3.3 Current Sense and Regulation
        1. Current Sensing
        2. Current Regulation
          1. Fixed Off-Time Current Chopping
          2. Cycle-By-Cycle Current Chopping
      4. 7.3.4 Protection Circuits
        1. VM Supply Undervoltage Lockout (UVLO)
        2. VCP Charge Pump Undervoltage Lockout (CPUV)
        3. OUTx Overcurrent Protection (OCP)
        4. Thermal Shutdown (TSD)
        5. Fault Condition Summary
      5. 7.3.5 Pin Diagrams
        1. Logic-Level Inputs
        2. Tri-Level Inputs
        3. Quad-Level Inputs
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Low-Power Sleep Mode
      3. 7.4.3 Fault Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Primary Application
        1. Design Requirements
        2. Detailed Design Procedure
          1. Current Sense and Regulation
          2. Power Dissipation and Output Current Capability
          3. Thermal Performance
            1. Steady-State Thermal Performance
            2. Transient Thermal Performance
        3. Application Curves
      2. 8.2.2 Alternative Application
        1. Design Requirements
        2. Detailed Design Procedure
          1. Current Sense and Regulation
        3. Application Curves
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 HTSSOP Layout Example
      2. 10.2.2 VQFN Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • PWP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information


The DRV887x family of devices are brushed DC motor drivers that operate from 4.5 to 37-V supporting a wide range of output load currents for various types of motors and loads. The devices integrate an H-bridge output power stage that can be operated in different control modes set by the PMODE pin setting. This allows for driving a single bidirectional brushed DC motor, two unidirectional brushed DC motors, or other output load configurations. The devices integrate a charge pump regulator to support more efficient high-side N-channel MOSFETs and 100% duty cycle operation. The devices operate from a single power supply input (VM) which can be directly connected to a battery or DC voltage supply. The nSLEEP pin provides an ultra-low power mode to minimize current draw during system inactivity.

The DRV887x family of devices also integrate current sense output using current mirrors on the low-side power MOSFETs. The IPROPI pin sources a small current that is proportional to the current in the MOSFETs. This current can be converted to a proportional voltage using an external resistor (RIPROPI). The integrated current sensing allows the DRV887x devices to limit the output current with a fixed off-time PWM chopping scheme and provide load information to the external controller to detect changes in load or stall conditions. The integrated current sensing out performs traditional external shunt resistor sensing by providing current information even during the off-time slow decay recirculating period and removing the need for an external power shunt resistor. The off-time PWM current regulation level can be configured during motor operation through the VREF pin to limit the load current accordingly to the system demands.

A variety of integrated protection features protect the device in the case of a system fault. These include undervoltage lockout (UVLO), charge pump undervoltage (CPUV), overcurrent protection (OCP), and overtemperature shutdown (TSD). Fault conditions are indicated on the nFAULT pin.