SBOS848B December   2017  – October 2019 INA381


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wide Input Common-Mode Voltage Range
      2. 7.3.2 Precise Low-Side Current Sensing
      3. 7.3.3 High Bandwidth and Slew Rate
      4. 7.3.4 Alert Output
      5. 7.3.5 Adjustable Overcurrent Threshold
      6. 7.3.6 Comparator Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Modes
        1. Transparent Output Mode
        2. Latch Output Mode
  8. Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Select a Current-Sensing Resistor
        1. Select a Current-Sensing Resistor: Example
      2. 8.1.2 Increase Comparator Hysteresis
      3. 8.1.3 Operation With Common-Mode Transients Greater Than 26 V
      4. 8.1.4 Input Filtering
    2. 8.2 Typical Applications
      1. 8.2.1 Bidirectional Window Comparator
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
      2. 8.2.2 Solenoid Low-Side Current Sensing
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGS|10
  • DSG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Filtering

If the INA381 output is connected to a high-impedance input, the device output is the best location to filter, using a simple RC network from VOUT to GND. Filtering at the output attenuates high-frequency disturbances in the common-mode voltage, differential input signal, and INA381 power-supply voltage. If filtering at the output is not possible, or if only the differential input signal needs filtering, a filter can be applied at the input pins of the device.

External filtering helps reduce the amount of noise that reaches the comparator, and thereby reduces the likelihood of a false alert. The tradeoff to adding this noise filter is that the alert response time is increased because both the input signal and noise are filtered. Figure 49 shows the implementation of an input filter for the device.

INA381 InputFiltering.gifFigure 49. Input Filter

The addition of external series resistance creates an additional error in the measurement; therefore, the value of these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. As shown in Figure 49, the internal bias network present at the input pins creates a mismatch in input bias currents when a differential voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor. This error results in a voltage at the device input pins that is different than the voltage developed across the shunt resistor. Without the additional series resistance, the mismatch in input bias currents has negligible effect on device operation. Equation 2 is used to calculate the gain error factor that is used with Equation 3 to calculate the percentage gain error when using external filter resistors.

Equation 2 shows that the amount of variance in the differential voltage present at the device input relative to the voltage developed at the shunt resistor is based both on the external series resistance (RF) value as well as internal input resistor RINT. The reduction of the shunt voltage reaching the device input pins appears as a gain error when comparing the output voltage relative to the voltage across the shunt resistor. Use Equation 2 to calculate the expected deviation from the shunt voltage to what is measured at the device input pins:

Equation 2. INA381 gainerr_factor_bos793.gif


  • RINT is the internal input resistor
  • RF is the external series resistance

The adjustment factor from Equation 2 including the device internal input resistance shown in Table 4 varies with each gain version. Table 5 lists each individual device gain error factor.

Table 4. Input Resistance

INA381A1 20 25
INA381A2 50 10
INA381A3 100 5
INA381A4 200 2.5

Table 5. Device Gain Error Factor

INA381A1 INA381 gainerr_A1_bos793.gif
INA381A2 INA381 gainerr_A2_bos793.gif
INA381A3 INA381 gainerr_A3_bos793.gif
INA381A4 INA381 gainerr_A4_bos793.gif

Use Equation 3 to then calculate the gain error that can be expected from the addition of the external series resistors:

Equation 3. INA381 q_gainerror_percent_bas437.gif

For example, using an INA381A2 and the corresponding gain error equation from Table 5, a series resistance of 10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 3, resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.