SBOS848B December   2017  – October 2019 INA381


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wide Input Common-Mode Voltage Range
      2. 7.3.2 Precise Low-Side Current Sensing
      3. 7.3.3 High Bandwidth and Slew Rate
      4. 7.3.4 Alert Output
      5. 7.3.5 Adjustable Overcurrent Threshold
      6. 7.3.6 Comparator Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Modes
        1. Transparent Output Mode
        2. Latch Output Mode
  8. Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Select a Current-Sensing Resistor
        1. Select a Current-Sensing Resistor: Example
      2. 8.1.2 Increase Comparator Hysteresis
      3. 8.1.3 Operation With Common-Mode Transients Greater Than 26 V
      4. 8.1.4 Input Filtering
    2. 8.2 Typical Applications
      1. 8.2.1 Bidirectional Window Comparator
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
      2. 8.2.2 Solenoid Low-Side Current Sensing
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGS|10
  • DSG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Latch Output Mode

Some applications cannot continuously monitor the state of the output ALERT pin to detect an overcurrent condition, as described in the Transparent Output Mode section. A typical example of this type of application is a system that only periodically polls the ALERT pin state to determine if the system is functioning correctly. If the device is set to transparent mode in this type of application, the state change of the ALERT pin can be missed when ALERT is pulled low if the out-of-range condition does not appear during one of these periodic polling events. Latch output mode is specifically intended to accommodate these applications.

As shown in Table 1, the device is placed into the corresponding output mode based on the signal connected to RESET. The difference between latch mode and transparent mode is how the alert output responds when an overcurrent event ends. In transparent mode (RESET = low), when the differential input signal drops below the limit threshold level after the ALERT pin asserts because of an overcurrent event, the state of the ALERT pin returns to the default high setting to indicate that the overcurrent event is complete.

Table 1. Output Mode Settings

Transparent RESET = low
Latch RESET = high

In latch mode (RESET = high), when an overlimit condition is detected and the ALERT pin is pulled low, the ALERT pin does not return to the default high state when the differential input signal drops to less than the alert threshold level. To clear the alert, the RESET pin must be pulled low for at least 100 ns. If the differential input signal is less than the alert threshold, pull the RESET pin low to return ALERT to the default high level. If the input signal exceeds the threshold limit when the RESET pin is pulled low, the ALERT pin remains low. When the alert condition is detected by the system controller, set the RESET pin back to high to place the device back in latch mode.

Figure 45 shows the latch and transparent modes. In Figure 45, when VIN drops to less than the VLIMIT threshold for the first time, the RESET pin pulls high. With the RESET pin pulled high, the device is set to latch mode so that the alert output state does not return high when the input signal drops to less than the VLIMIT threshold. Only when the RESET pin is pulled low does the ALERT pin return to the default high level, thus indicating that the input signal is below the limit threshold. When the input signal drops to less than the limit threshold for the second time, the RESET pin is already pulled low. The device is set to transparent mode at this point, and the ALERT pin is pulled back high when the input signal drops below the alert threshold.

INA381 ina381-transparent-mode-versus-latch-mode.gifFigure 45. Transparent Mode Versus Latch Mode