SBOS945B November   2020  – April 2021 INA849

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adjustable Gain Setting
      2. 8.3.2 Gain Drift
      3. 8.3.3 Wide Input Common-Mode Range
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reference Pin
      2. 9.1.2 Input Bias Current Return Path
      3. 9.1.3 Thermal Effects due to Power Dissipation
    2. 9.2 Typical Application
      1. 9.2.1 Sensor Conditioning Circuit
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Phantom Power in Microphone Preamplifier Circuit
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Gain Drift

The stability and temperature drift of external gain setting resistor RG also affects gain. The contribution of RG to gain accuracy and drift is determined from Equation 1.

The best gain drift of 5 ppm/℃ (maximum) is achieved when the INA849 uses G = 1 without RG connected. In this case, gain drift is limited by the mismatch of the temperature coefficient of the integrated 5-kΩ resistors in differential amplifier A3. At gains greater than 1, gain drift increases as a result of the individual drift of the 3-kΩ resistors in the feedback of A1 and A2, relative to the drift of external gain resistor RG.

The low temperature coefficient of the internal feedback resistors improves the overall temperature stability of applications using gains greater than 1 V/V over alternate solutions.

The low resistor values required for high gain make wiring resistance an important consideration. Sockets add to the wiring resistance and contribute additional gain error (such as a possible unstable gain error) at gains of approximately 100 or greater.

To maintain stability, avoid parasitic capacitance of more than a few picofarads at the RG connections. Careful matching of any parasitics on the RG pins maintains optimal CMRR over frequency.